diff options
| author | Alexander Kochetkov <al.kochet@gmail.com> | 2017-01-31 15:43:15 +0300 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2017-04-07 16:23:06 +0200 |
| commit | 627988a66aee3c845aa2f1f874a3ddba8adb89d9 (patch) | |
| tree | dcadfc9dfa9bae2358d0525c73c8ba36ae7463c7 /arch/arm | |
| parent | 5e0a39d0f727b35c8b7ef56ba0724c8ceb006297 (diff) | |
ARM: dts: rockchip: Add timer entries to rk3188 SoC
The patch add two timers to all rk3188 based boards.
The first timer is from alive subsystem and it act as a backup
for the local timers at sleep time. It act the same as other
SoC rockchip timers already present in kernel.
The second timer is from CPU subsystem and act as replacement
for the arm-global-timer clocksource and sched clock. It run
at stable frequency 24MHz.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/rk3188.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index cf91254d0a43..8428faeb9c60 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -106,6 +106,22 @@ }; }; + timer3: timer@2000e000 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x2000e000 0x20>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>; + clock-names = "timer", "pclk"; + }; + + timer6: timer@200380a0 { + compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; + reg = <0x200380a0 0x20>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>; + clock-names = "timer", "pclk"; + }; + i2s0: i2s@1011a000 { compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s"; reg = <0x1011a000 0x2000>; |