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authorArnd Bergmann <arnd@arndb.de>2023-12-21 16:17:22 +0000
committerArnd Bergmann <arnd@arndb.de>2023-12-21 16:18:08 +0000
commit084d415d219f81c3bdb7e8e94a8a07c59db054f4 (patch)
tree439ff0e7e661e9d7cb11c4114b0e58a9ad1777da /arch/arm
parente0a220a3adb35b2b282534d0fa1b2cfd50bab44c (diff)
parent2de1bb183a6999521a114d3ed0b17d15b8e75e04 (diff)
Merge tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.8, round 1 Highlights: ---------- - MCU: - Add SPI support on STM32F746. - Better describe vcc_3v3 for SD and DSI on stm32f469-disco. - MPU: - STM32MP13: - Add DCMIPP (Digital Camera Memory Interface Piwel Processor) on STM32MP135. - STMP32MP15: - Change "phys" affectation from board to Soc dtsi file for USB host as it is hard linked to the port 0 of usbphyc. - Fix SCMI and No-SCMI compatible in boards. - STM32MP25: - Add BSEC support to read the device part number OTP and the package data register OTP. * tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add dcmipp support to stm32mp135 arm64: dts: st: add bsec support to stm32mp25 ARM: dts: stm32: Consolidate usbh_[eo]hci phy properties on stm32mp15 ARM: dts: stm32: don't mix SCMI and non-SCMI board compatibles dt-bindings: arm: stm32: don't mix SCMI and non-SCMI board compatibles ARM: dts: stm32: minor whitespace cleanup around '=' ARM: dts: stm32: add SPI support on STM32F746 ARM: dts: stm32: add STM32F746 syscfg clock ARM: dts: stm32: use the same 3v3 for SD and DSI nodes on stm32f469-disco Link: https://lore.kernel.org/r/9363227b-1c44-4a20-b245-efbbbf9ab1dd@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/st/stm32f469-disco.dts15
-rw-r--r--arch/arm/boot/dts/st/stm32f746.dtsi61
-rw-r--r--arch/arm/boot/dts/st/stm32mp135.dtsi11
-rw-r--r--arch/arm/boot/dts/st/stm32mp151.dtsi4
-rw-r--r--arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts5
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-ev1.dts1
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts4
-rw-r--r--arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi4
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi3
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi1
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi1
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi2
-rw-r--r--arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi1
22 files changed, 88 insertions, 51 deletions
diff --git a/arch/arm/boot/dts/st/stm32f469-disco.dts b/arch/arm/boot/dts/st/stm32f469-disco.dts
index cbbd521bf010..8a4f8ddd083d 100644
--- a/arch/arm/boot/dts/st/stm32f469-disco.dts
+++ b/arch/arm/boot/dts/st/stm32f469-disco.dts
@@ -69,16 +69,9 @@
serial0 = &usart3;
};
- mmc_vcard: mmc_vcard {
+ vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
- regulator-name = "mmc_vcard";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vdd_dsi: vdd-dsi {
- compatible = "regulator-fixed";
- regulator-name = "vdd_dsi";
+ regulator-name = "vcc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
@@ -164,7 +157,7 @@
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
- power-supply = <&vdd_dsi>;
+ power-supply = <&vcc_3v3>;
status = "okay";
port {
@@ -219,7 +212,7 @@
&sdio {
status = "okay";
- vmmc-supply = <&mmc_vcard>;
+ vmmc-supply = <&vcc_3v3>;
cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
broken-cd;
pinctrl-names = "default", "opendrain";
diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
index 53a8e2dec9a4..65c72b6fcc83 100644
--- a/arch/arm/boot/dts/st/stm32f746.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746.dtsi
@@ -274,6 +274,26 @@
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
};
+ spi2: spi@40003800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40003800 0x400>;
+ interrupts = <36>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>;
+ status = "disabled";
+ };
+
+ spi3: spi@40003c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40003c00 0x400>;
+ interrupts = <51>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI3)>;
+ status = "disabled";
+ };
+
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -491,9 +511,30 @@
status = "disabled";
};
+ spi1: spi@40013000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40013000 0x400>;
+ interrupts = <35>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI1)>;
+ status = "disabled";
+ };
+
+ spi4: spi@40013400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40013400 0x400>;
+ interrupts = <84>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI4)>;
+ status = "disabled";
+ };
+
syscfg: syscon@40013800 {
compatible = "st,stm32-syscfg", "syscon";
reg = <0x40013800 0x400>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>;
};
exti: interrupt-controller@40013c00 {
@@ -554,6 +595,26 @@
};
};
+ spi5: spi@40015000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40015000 0x400>;
+ interrupts = <85>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI5)>;
+ status = "disabled";
+ };
+
+ spi6: spi@40015400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32f7-spi";
+ reg = <0x40015400 0x400>;
+ interrupts = <86>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI6)>;
+ status = "disabled";
+ };
+
ltdc: display-controller@40016800 {
compatible = "st,stm32-ltdc";
reg = <0x40016800 0x200>;
diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi
index abf2acd37b4e..68d32f9f5314 100644
--- a/arch/arm/boot/dts/st/stm32mp135.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp135.dtsi
@@ -8,5 +8,16 @@
/ {
soc {
+ dcmipp: dcmipp@5a000000 {
+ compatible = "st,stm32mp13-dcmipp";
+ reg = <0x5a000000 0x400>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rcc DCMIPP_R>;
+ clocks = <&rcc DCMIPP_K>;
+ status = "disabled";
+
+ port {
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
index 61508917521c..fa4cbd312e5a 100644
--- a/arch/arm/boot/dts/st/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
@@ -1521,6 +1521,8 @@
clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbphyc_port0>;
+ phy-names = "usb";
status = "disabled";
};
@@ -1531,6 +1533,8 @@
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
companion = <&usbh_ohci>;
+ phys = <&usbphyc_port0>;
+ phy-names = "usb";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi b/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
index dd23de85100c..3938d357e198 100644
--- a/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
@@ -206,8 +206,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
index afcd6285890c..ce5937270aa1 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts
@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
- compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157";
+ compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
reserved-memory {
optee@de000000 {
@@ -59,7 +59,7 @@
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
+ reset-names = "mcu_rst", "hold_boot";
};
&rcc {
diff --git a/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi b/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi
index 5f85598cc7c6..5c1cc48e5199 100644
--- a/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi
@@ -313,8 +313,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
index 39358d902000..c20a73841c1f 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts
@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
- compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";
+ compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
reserved-memory {
optee@de000000 {
@@ -65,7 +65,7 @@
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
+ reset-names = "mcu_rst", "hold_boot";
};
&rcc {
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
index 07ea765a4553..5e2eaf57ce22 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts
@@ -11,7 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
- compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
+ compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
reserved-memory {
optee@fe000000 {
@@ -64,7 +64,7 @@
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
+ reset-names = "mcu_rst", "hold_boot";
};
&rcc {
diff --git a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi
index f928cfb80b87..4792004cab0c 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi
@@ -500,14 +500,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
index 813086ec2489..3226fb945a8e 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts
@@ -11,8 +11,7 @@
/ {
model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
- compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",
- "st,stm32mp157";
+ compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
reserved-memory {
optee@fe000000 {
@@ -70,7 +69,7 @@
/delete-property/ st,syscfg-holdboot;
resets = <&scmi_reset RST_SCMI_MCU>,
<&scmi_reset RST_SCMI_MCU_HOLD_BOOT>;
- reset-names = "mcu_rst", "hold_boot";
+ reset-names = "mcu_rst", "hold_boot";
};
&rcc {
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
index cd9c3ff5378b..9eb9a1bf4f2c 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
@@ -362,7 +362,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
index bd67a1db9122..527c33be66cc 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts
@@ -197,14 +197,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi b/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi
index 4e8b2d2b30c7..bf0c32027baf 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi
@@ -547,14 +547,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
index f09b7c384bd9..fc3a2386dbb9 100644
--- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi
@@ -567,9 +567,6 @@ baseboard_eeprom: &sip_eeprom {
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
-
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi
index 35b1034aa3cf..bb4f8a0b937f 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi
@@ -152,7 +152,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
index 46b87a27d8b3..466d9701add0 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi
@@ -305,7 +305,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi
index abc595350e71..b5bc53accd6b 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi
@@ -119,12 +119,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
index 0069ad75d55e..343a4613dfca 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi
@@ -489,8 +489,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
index 92d906bfd5d7..bc4ddcbdd5cf 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi
@@ -312,12 +312,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
index ab7f0ba49639..6e79c4b6fe32 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi
@@ -168,12 +168,10 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
- phys = <&usbphyc_port0>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
index 511113f2e399..f7634c51efb2 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
@@ -680,7 +680,6 @@
};
&usbh_ehci {
- phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;