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authorMichael Hennerich <michael.hennerich@analog.com>2009-09-25 09:03:21 +0000
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:14:00 -0500
commitd887a1ce285f03c689bb4fbbaf574160bb484c3e (patch)
treecb1bfea50d25294c7a4c1c886f1b0b5aab743016 /arch/blackfin/kernel/bfin_gpio.c
parent21b03cfe4c50fd586bfebd06d852457c07f60c2b (diff)
Blackfin: cpufreq: use a constant latency
PLL_LOCKCNT applies only to the PLL programming sequence which does not apply to core and system clock dividers. Writes to PLL_DIV to change the CSEL/SSEL dividers take effect immediately. There is still overhead in software in writing the new dividers, so just use a value of 50us as this should be good enough. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/kernel/bfin_gpio.c')
0 files changed, 0 insertions, 0 deletions