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authorMichael Hennerich <michael.hennerich@analog.com>2010-08-02 08:51:07 +0000
committerMike Frysinger <vapier@gentoo.org>2010-08-06 12:55:57 -0400
commitf619ddd4fe5e6da3c3e97fe21043a4233aa54aee (patch)
tree066f624fb958d70e48a223140c1b569d215e4dc3 /arch/blackfin/mach-common
parent39750324053c2aa4314e460b5ce1767f4dfbeff1 (diff)
Blackfin: dpmc: punt unnecessary RTC_ISTAT clearing
The RTC ISTAT bits do not affect wakeups, and the RTC driver already takes care of clearing this MMR when necessary. So drop the useless clearing in the core Blackfin power code. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S24
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index b03716896051..5969d86836a5 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -17,9 +17,6 @@ ENTRY(_sleep_mode)
call _set_sic_iwr;
- R0 = 0xFFFF (Z);
- call _set_rtc_istat;
-
P0.H = hi(PLL_CTL);
P0.L = lo(PLL_CTL);
R1 = W[P0](z);
@@ -65,9 +62,6 @@ ENTRY(_hibernate_mode)
call _set_dram_srfs;
SSYNC;
- R0 = 0xFFFF (Z);
- call _set_rtc_istat;
-
P0.H = hi(VR_CTL);
P0.L = lo(VR_CTL);
@@ -95,9 +89,6 @@ ENTRY(_sleep_deeper)
call _set_sic_iwr;
call _set_dram_srfs; /* Set SDRAM Self Refresh */
- /* Clear all the interrupts,bits sticky */
- R0 = 0xFFFF (Z);
- call _set_rtc_istat;
P0.H = hi(PLL_DIV);
P0.L = lo(PLL_DIV);
R6 = W[P0](z);
@@ -269,21 +260,6 @@ ENTRY(_set_sic_iwr)
RTS;
ENDPROC(_set_sic_iwr)
-ENTRY(_set_rtc_istat)
-#ifndef CONFIG_BF561
- P0.H = hi(RTC_ISTAT);
- P0.L = lo(RTC_ISTAT);
- w[P0] = R0.L;
- SSYNC;
-#elif (ANOMALY_05000371)
- nop;
- nop;
- nop;
- nop;
-#endif
- RTS;
-ENDPROC(_set_rtc_istat)
-
ENTRY(_test_pll_locked)
P0.H = hi(PLL_STAT);
P0.L = lo(PLL_STAT);