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authorChristoph Hellwig <hch@lst.de>2019-08-06 14:12:37 +0300
committerChristoph Hellwig <hch@lst.de>2019-09-04 11:13:18 +0200
commit5128da323514d1e4260a26f8284c26bc09f97f40 (patch)
tree1ba917cc0875f2aba48809d3264f5926941bc11e /arch/c6x
parent07d841a625bc5faee167adc296d04cbca7779703 (diff)
parisc: don't set ARCH_NO_COHERENT_DMA_MMAP
parisc is the only architecture that sets ARCH_NO_COHERENT_DMA_MMAP when an MMU is enabled. AFAIK this is because parisc CPUs use VIVT caches, which means exporting normally cachable memory to userspace is relatively dangrous due to cache aliasing. But normally cachable memory is only allocated by dma_alloc_coherent on parisc when using the sba_iommu or ccio_iommu drivers, so just remove the .mmap implementation for them so that we don't have to set ARCH_NO_COHERENT_DMA_MMAP, which I plan to get rid of. Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'arch/c6x')
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