diff options
| author | Rabin Vincent <rabin@rab.in> | 2015-08-03 20:19:22 +0200 |
|---|---|---|
| committer | Jesper Nilsson <jespern@axis.com> | 2015-11-02 20:03:05 +0100 |
| commit | 25624b98509f6868829a093392bb6437bcbd7beb (patch) | |
| tree | b5b75388e44e020710dfd4c7892fea0014186da9 /arch/cris/boot/dts/artpec3.dtsi | |
| parent | a95b3ba2c322c3c373d34988d6928311b1b447a1 (diff) | |
CRIS v32: add ARTPEC-3 and P1343 device trees
Add a device tree for the Axis P1343 with the ARTPEC-3 SoC and on-board
LEDs and RTC.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Diffstat (limited to 'arch/cris/boot/dts/artpec3.dtsi')
| -rw-r--r-- | arch/cris/boot/dts/artpec3.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/cris/boot/dts/artpec3.dtsi b/arch/cris/boot/dts/artpec3.dtsi new file mode 100644 index 000000000000..be15be67b653 --- /dev/null +++ b/arch/cris/boot/dts/artpec3.dtsi @@ -0,0 +1,46 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "axis,crisv32"; + reg = <0>; + }; + }; + + soc { + compatible = "simple-bus"; + model = "artpec3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc: interrupt-controller { + compatible = "axis,crisv32-intc"; + reg = <0xb002a000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gio: gpio@b0020000 { + compatible = "axis,artpec3-gio"; + reg = <0xb0020000 0x1000>; + interrupts = <61>; + gpio-controller; + #gpio-cells = <3>; + }; + + serial@b003e000 { + compatible = "axis,etraxfs-uart"; + reg = <0xb003e000 0x1000>; + interrupts = <64>; + status = "disabled"; + }; + }; +}; |