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authorGuo Ren <ren_guo@c-sky.com>2019-06-18 20:33:32 +0800
committerGuo Ren <ren_guo@c-sky.com>2019-07-19 14:21:36 +0800
commit22d55f02b8922a097cd4be1e2f131dfa7ef65901 (patch)
treee8e0c0f8c5071343902090aa225fb92bd5747536 /arch/csky/abiv2
parenta231b8839cd4259de1d37a78165739a4d5d08e72 (diff)
csky: Use generic asid algorithm to implement switch_mm
Use linux generic asid/vmid algorithm to implement csky switch_mm function. The algorithm is from arm and it could work with SMP system. It'll help reduce tlb flush for switch_mm in task/vm switch. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/csky/abiv2')
-rw-r--r--arch/csky/abiv2/inc/abi/ckmmu.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/csky/abiv2/inc/abi/ckmmu.h b/arch/csky/abiv2/inc/abi/ckmmu.h
index e4480e6bc3b3..73ded7c72482 100644
--- a/arch/csky/abiv2/inc/abi/ckmmu.h
+++ b/arch/csky/abiv2/inc/abi/ckmmu.h
@@ -85,6 +85,16 @@ static inline void tlb_invalid_all(void)
#endif
}
+static inline void local_tlb_invalid_all(void)
+{
+#ifdef CONFIG_CPU_HAS_TLBI
+ asm volatile("tlbi.all\n":::"memory");
+ sync_is();
+#else
+ tlb_invalid_all();
+#endif
+}
+
static inline void tlb_invalid_indexed(void)
{
mtcr("cr<8, 15>", 0x02000000);