summaryrefslogtreecommitdiff
path: root/arch/csky
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2023-05-04 12:25:05 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2023-05-04 12:25:05 -0700
commita1f749de8a610096ca0dd9a40d89c8fa4098c8eb (patch)
tree458779a43df70aefca85aa1f429cffb79cf36a87 /arch/csky
parent1a5304fecee523060f26e2778d9d8e33c0562df3 (diff)
parent1f62ed00a56bf01becaccd81bf30f2fcb0322fd2 (diff)
Merge tag 'csky-for-linus-6.4' of https://github.com/c-sky/csky-linux
Pull arch/csky updates from Guo Ren: - Remove CPU_TLB_SIZE config - Prevent spurious page faults * tag 'csky-for-linus-6.4' of https://github.com/c-sky/csky-linux: csky: mmu: Prevent spurious page faults csky: remove obsolete config CPU_TLB_SIZE
Diffstat (limited to 'arch/csky')
-rw-r--r--arch/csky/Kconfig5
-rw-r--r--arch/csky/abiv1/cacheflush.c3
-rw-r--r--arch/csky/abiv2/cacheflush.c3
3 files changed, 6 insertions, 5 deletions
diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
index 00379a843c37..4df1f8c9d170 100644
--- a/arch/csky/Kconfig
+++ b/arch/csky/Kconfig
@@ -166,11 +166,6 @@ config STACKTRACE_SUPPORT
config TIME_LOW_RES
def_bool y
-config CPU_TLB_SIZE
- int
- default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
- default "1024" if (CPU_CK860)
-
config CPU_ASID_BITS
int
default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
diff --git a/arch/csky/abiv1/cacheflush.c b/arch/csky/abiv1/cacheflush.c
index fb91b069dc69..94fbc03cbe70 100644
--- a/arch/csky/abiv1/cacheflush.c
+++ b/arch/csky/abiv1/cacheflush.c
@@ -11,6 +11,7 @@
#include <asm/cache.h>
#include <asm/cacheflush.h>
#include <asm/cachectl.h>
+#include <asm/tlbflush.h>
#define PG_dcache_clean PG_arch_1
@@ -40,6 +41,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
unsigned long pfn = pte_pfn(*ptep);
struct page *page;
+ flush_tlb_page(vma, addr);
+
if (!pfn_valid(pfn))
return;
diff --git a/arch/csky/abiv2/cacheflush.c b/arch/csky/abiv2/cacheflush.c
index 39c51399dd81..9923cd24db58 100644
--- a/arch/csky/abiv2/cacheflush.c
+++ b/arch/csky/abiv2/cacheflush.c
@@ -5,6 +5,7 @@
#include <linux/highmem.h>
#include <linux/mm.h>
#include <asm/cache.h>
+#include <asm/tlbflush.h>
void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
pte_t *pte)
@@ -12,6 +13,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
unsigned long addr;
struct page *page;
+ flush_tlb_page(vma, address);
+
if (!pfn_valid(pte_pfn(*pte)))
return;