diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2018-03-07 21:21:59 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-09 23:19:58 +0100 |
| commit | fd8773f9f544955f6f47dc2ac3ab85ad64376b7f (patch) | |
| tree | 2eedaf10b5a4b62df0d3b514cec9614a6af6b563 /arch/frv/lib/__ashldi3.S | |
| parent | 739d875dd6982618020d30f58f8acf10f6076e6d (diff) | |
arch: remove frv port
The Fujitsu FRV kernel port has been around for a long time, but has not
seen regular updates in several years and instead was marked 'Orphaned'
in 2016 by long-time maintainer David Howells.
The SoC product line apparently is apparently still around in the form
of the Socionext Milbeaut image processor, but this one no longer uses
the FRV CPU cores.
This removes all FRV specific files from the kernel.
Link: http://www.socionext.com/en/products/assp/milbeaut/
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/frv/lib/__ashldi3.S')
| -rw-r--r-- | arch/frv/lib/__ashldi3.S | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/arch/frv/lib/__ashldi3.S b/arch/frv/lib/__ashldi3.S deleted file mode 100644 index db5b6dc37a11..000000000000 --- a/arch/frv/lib/__ashldi3.S +++ /dev/null @@ -1,40 +0,0 @@ -/* __ashldi3.S: 64-bit arithmetic shift left - * - * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - - .text - .p2align 4 - -############################################################################### -# -# unsigned long long __ashldi3(unsigned long long value [GR8:GR9], unsigned by [GR10]) -# -############################################################################### - .globl __ashldi3 - .type __ashldi3,@function -__ashldi3: - andicc.p gr10,#63,gr10,icc0 - setlos #32,gr5 - andicc.p gr10,#32,gr0,icc1 - beqlr icc0,#0 - ckeq icc1,cc4 ; cc4 is true if 0<N<32 - - # deal with a shift in the range 1<=N<=31 - csll.p gr8,gr10,gr8 ,cc4,#1 ; MSW <<= N - csub gr5,gr10,gr5 ,cc4,#1 ; M = 32 - N - csrl.p gr9,gr5,gr4 ,cc4,#1 - csll gr9,gr10,gr9 ,cc4,#1 ; LSW <<= N - cor.p gr4,gr8,gr8 ,cc4,#1 ; MSW |= LSW >> M - - # deal with a shift in the range 32<=N<=63 - csll gr9,gr10,gr8 ,cc4,#0 ; MSW = LSW << (N & 31 [implicit AND]) - cor.p gr0,gr0,gr9 ,cc4,#0 ; LSW = 0 - bralr - .size __ashldi3, .-__ashldi3 |