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authorChristoph Hellwig <hch@lst.de>2019-08-13 09:25:02 +0200
committerTony Luck <tony.luck@intel.com>2019-08-16 11:33:57 -0700
commit05933aac7b11911955de307a329dc2a7a14b7bd0 (patch)
tree5fbf522b4adc70501eed8986930bc0744bbb7810 /arch/ia64/include/asm/mmiowb.h
parentcf07cb1ff4ea008abf06c95878c700cf1dd65c3e (diff)
ia64: remove now unused machvec indirections
With the SGI SN2 machvec removal most of the indirections are unused now, so remove them. This includes the entire removal of the mmio read*/write* macros as the generic ones are identical to the asm-generic/io.h version. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lkml.kernel.org/r/20190813072514.23299-17-hch@lst.de Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/include/asm/mmiowb.h')
-rw-r--r--arch/ia64/include/asm/mmiowb.h12
1 files changed, 2 insertions, 10 deletions
diff --git a/arch/ia64/include/asm/mmiowb.h b/arch/ia64/include/asm/mmiowb.h
index 297b85ac84a0..d67aab4ea3b4 100644
--- a/arch/ia64/include/asm/mmiowb.h
+++ b/arch/ia64/include/asm/mmiowb.h
@@ -3,22 +3,14 @@
#ifndef _ASM_IA64_MMIOWB_H
#define _ASM_IA64_MMIOWB_H
-#include <asm/machvec.h>
-
/**
- * ___ia64_mmiowb - I/O write barrier
+ * mmiowb - I/O write barrier
*
* Ensure ordering of I/O space writes. This will make sure that writes
* following the barrier will arrive after all previous writes. For most
* ia64 platforms, this is a simple 'mf.a' instruction.
*/
-static inline void ___ia64_mmiowb(void)
-{
- ia64_mfa();
-}
-
-#define __ia64_mmiowb ___ia64_mmiowb
-#define mmiowb() platform_mmiowb()
+#define mmiowb() ia64_mfa()
#include <asm-generic/mmiowb.h>