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authorMatthew Wilcox <matthew@wil.cx>2009-05-22 13:49:49 -0700
committerTony Luck <tony.luck@intel.com>2009-06-17 09:33:49 -0700
commite088a4ad7fa53c3dc3c29f930025f41ccf01953e (patch)
tree07b012952bbbaccfe4ef3bb44b1ea0a3a3bb3868 /arch/ia64/include/asm/processor.h
parente56e2dcd381d9ec35379328f332221581eda4787 (diff)
[IA64] Convert ia64 to use int-ll64.h
It is generally agreed that it would be beneficial for u64 to be an unsigned long long on all architectures. ia64 (in common with several other 64-bit architectures) currently uses unsigned long. Migrating piecemeal is too painful; this giant patch fixes all compilation warnings and errors that come as a result of switching to use int-ll64.h. Note that userspace will still see __u64 defined as unsigned long. This is important as it affects C++ name mangling. [Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use u64 for start/end rather than unsigned long] Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/include/asm/processor.h')
-rw-r--r--arch/ia64/include/asm/processor.h56
1 files changed, 28 insertions, 28 deletions
diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h
index f88fa054d01d..3eaeedf1aef2 100644
--- a/arch/ia64/include/asm/processor.h
+++ b/arch/ia64/include/asm/processor.h
@@ -187,40 +187,40 @@ union ia64_rr {
* state comes earlier:
*/
struct cpuinfo_ia64 {
- __u32 softirq_pending;
- __u64 itm_delta; /* # of clock cycles between clock ticks */
- __u64 itm_next; /* interval timer mask value to use for next clock tick */
- __u64 nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */
- __u64 unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */
- __u64 unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */
- __u64 itc_freq; /* frequency of ITC counter */
- __u64 proc_freq; /* frequency of processor */
- __u64 cyc_per_usec; /* itc_freq/1000000 */
- __u64 ptce_base;
- __u32 ptce_count[2];
- __u32 ptce_stride[2];
+ unsigned int softirq_pending;
+ unsigned long itm_delta; /* # of clock cycles between clock ticks */
+ unsigned long itm_next; /* interval timer mask value to use for next clock tick */
+ unsigned long nsec_per_cyc; /* (1000000000<<IA64_NSEC_PER_CYC_SHIFT)/itc_freq */
+ unsigned long unimpl_va_mask; /* mask of unimplemented virtual address bits (from PAL) */
+ unsigned long unimpl_pa_mask; /* mask of unimplemented physical address bits (from PAL) */
+ unsigned long itc_freq; /* frequency of ITC counter */
+ unsigned long proc_freq; /* frequency of processor */
+ unsigned long cyc_per_usec; /* itc_freq/1000000 */
+ unsigned long ptce_base;
+ unsigned int ptce_count[2];
+ unsigned int ptce_stride[2];
struct task_struct *ksoftirqd; /* kernel softirq daemon for this CPU */
#ifdef CONFIG_SMP
- __u64 loops_per_jiffy;
+ unsigned long loops_per_jiffy;
int cpu;
- __u32 socket_id; /* physical processor socket id */
- __u16 core_id; /* core id */
- __u16 thread_id; /* thread id */
- __u16 num_log; /* Total number of logical processors on
+ unsigned int socket_id; /* physical processor socket id */
+ unsigned short core_id; /* core id */
+ unsigned short thread_id; /* thread id */
+ unsigned short num_log; /* Total number of logical processors on
* this socket that were successfully booted */
- __u8 cores_per_socket; /* Cores per processor socket */
- __u8 threads_per_core; /* Threads per core */
+ unsigned char cores_per_socket; /* Cores per processor socket */
+ unsigned char threads_per_core; /* Threads per core */
#endif
/* CPUID-derived information: */
- __u64 ppn;
- __u64 features;
- __u8 number;
- __u8 revision;
- __u8 model;
- __u8 family;
- __u8 archrev;
+ unsigned long ppn;
+ unsigned long features;
+ unsigned char number;
+ unsigned char revision;
+ unsigned char model;
+ unsigned char family;
+ unsigned char archrev;
char vendor[16];
char *model_name;
@@ -329,8 +329,8 @@ struct thread_struct {
#else
# define INIT_THREAD_PM
#endif
- __u64 dbr[IA64_NUM_DBG_REGS];
- __u64 ibr[IA64_NUM_DBG_REGS];
+ unsigned long dbr[IA64_NUM_DBG_REGS];
+ unsigned long ibr[IA64_NUM_DBG_REGS];
struct ia64_fpreg fph[96]; /* saved/loaded on demand */
};