diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2010-11-09 10:40:44 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-01-05 15:19:18 +1000 |
| commit | 3d461401eb5e3a8c471e92500aebd6c115273fba (patch) | |
| tree | 9b8df3b3afb8f358851527db5c73b40dfc65228d /arch/m68k/include/asm/m54xxsim.h | |
| parent | 278c2cbd59371bc8905d83b7cc3aa0bbe69c00f1 (diff) | |
m68knommu: move inclusion of ColdFire v4 cache registers
Move the inclusion of the version 4 cache controller registers so that
it is with all the other register bit flag definitions. This makes it
consistent with the other version core inclusion points, and means we
don't need "#ifdef"ery in odd-ball places for these definitions.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m54xxsim.h')
| -rw-r--r-- | arch/m68k/include/asm/m54xxsim.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index a08a7ae776b1..462ae5328441 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -8,6 +8,8 @@ #define CPU_NAME "COLDFIRE(m54xx)" #define CPU_INSTR_PER_JIFFY 2 +#include <asm/m54xxacr.h> + #define MCFINT_VECBASE 64 /* |