diff options
| author | Peter Zijlstra <peterz@infradead.org> | 2020-01-31 13:45:34 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert@linux-m68k.org> | 2020-02-10 10:57:48 +0100 |
| commit | 13076a29d52e91d29ab6b13e7279c9eacd0b6dbb (patch) | |
| tree | 0f570e991c449c46f76d9868e3c79c4a38912967 /arch/m68k/mm | |
| parent | fd1aa6303c4d6f3c1489eadc5cc37e581c3b41ea (diff) | |
m68k: mm: Unify Motorola MMU page setup
Seeing how there are 5 copies of this magic code, one of which is
unexplainably different, unify and document things.
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
Tested-by: Michael Schmitz <schmitzmic@gmail.com>
Tested-by: Greg Ungerer <gerg@linux-m68k.org>
Link: https://lore.kernel.org/r/20200131125403.597688427@infradead.org
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Diffstat (limited to 'arch/m68k/mm')
| -rw-r--r-- | arch/m68k/mm/memory.c | 5 | ||||
| -rw-r--r-- | arch/m68k/mm/motorola.c | 30 |
2 files changed, 26 insertions, 9 deletions
diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c index 227c04fe60d2..36683f2a28d0 100644 --- a/arch/m68k/mm/memory.c +++ b/arch/m68k/mm/memory.c @@ -77,8 +77,7 @@ pmd_t *get_pointer_table (void) if (!(page = (void *)get_zeroed_page(GFP_KERNEL))) return NULL; - flush_tlb_kernel_page(page); - nocache_page(page); + mmu_page_ctor(page); new = PD_PTABLE(page); PD_MARKBITS(new) = 0xfe; @@ -112,7 +111,7 @@ int free_pointer_table (pmd_t *ptable) if (PD_MARKBITS(dp) == 0xff) { /* all tables in page are free, free page */ list_del(dp); - cache_page((void *)page); + mmu_page_dtor((void *)page); free_page (page); return 1; } else if (ptable_list.next != dp) { diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index 4857985b8080..be61f35a7432 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c @@ -45,6 +45,28 @@ unsigned long mm_cachebits; EXPORT_SYMBOL(mm_cachebits); #endif + +/* + * Motorola 680x0 user's manual recommends using uncached memory for address + * translation tables. + * + * Seeing how the MMU can be external on (some of) these chips, that seems like + * a very important recommendation to follow. Provide some helpers to combat + * 'variation' amongst the users of this. + */ + +void mmu_page_ctor(void *page) +{ + __flush_page_to_ram(page); + flush_tlb_kernel_page(page); + nocache_page(page); +} + +void mmu_page_dtor(void *page) +{ + cache_page(page); +} + /* size of memory already mapped in head.S */ extern __initdata unsigned long m68k_init_mapped_size; @@ -60,9 +82,7 @@ static pte_t * __init kernel_page_table(void) __func__, PAGE_SIZE, PAGE_SIZE); clear_page(ptablep); - __flush_page_to_ram(ptablep); - flush_tlb_kernel_page(ptablep); - nocache_page(ptablep); + mmu_page_ctor(ptablep); return ptablep; } @@ -106,9 +126,7 @@ static pmd_t * __init kernel_ptr_table(void) __func__, PAGE_SIZE, PAGE_SIZE); clear_page(last_pgtable); - __flush_page_to_ram(last_pgtable); - flush_tlb_kernel_page(last_pgtable); - nocache_page(last_pgtable); + mmu_page_ctor(last_pgtable); } return last_pgtable; |