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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-02 19:51:03 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 23:34:23 +0100
commitce1d43b9a9e8a3db8fe91696c0b0e3ac1a154e34 (patch)
tree7e47005c61e98f44005c17a636457c4398c73fdd /arch/mips/alchemy/common/Makefile
parent2e8fd2e5efe6b7cebba0beec44c6c2f474c6b726 (diff)
MIPS: Alchemy: support multiple GPIO styles in one kernel
For GPIOLIB=y decide at runtime which gpiochips to register; in the GPIOLIB=n case, the gpio headers need to be reshuffled a bit to make multiple implementations coexist peacefully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2679/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/Makefile')
-rw-r--r--arch/mips/alchemy/common/Makefile4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile
index 27811fe341d6..62f0d39e93cd 100644
--- a/arch/mips/alchemy/common/Makefile
+++ b/arch/mips/alchemy/common/Makefile
@@ -12,9 +12,7 @@ obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o
# optional gpiolib support
ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),)
- ifeq ($(CONFIG_GPIOLIB),y)
- obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += gpiolib-au1000.o
- endif
+ obj-$(CONFIG_GPIOLIB) += gpiolib.o
endif
obj-$(CONFIG_PCI) += pci.o