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authorSergey Ryazanov <ryazanov.s.a@gmail.com>2014-10-29 03:18:46 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:45:28 +0100
commitd58eaa7ffdcb58ab8bb95927149e2f152ec163c6 (patch)
treee56c61326c0a1ac748c212a9113f7308c3c4e4e9 /arch/mips/ath25
parent1654861f6e02e74a2ba059d1f62dc0356429d7cf (diff)
MIPS: ath25: register AR5312 flash controller
AR5312 SoC flash controller maps the flash content to memory and translates the memory access operations to the flash access operations. Such controller is fully supported by the physmap-flash driver. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>R5312 SoC flash Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8245/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25')
-rw-r--r--arch/mips/ath25/ar5312.c38
1 files changed, 36 insertions, 2 deletions
diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c
index 26942a2c298d..383dd6c38e0a 100644
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -19,6 +19,8 @@
#include <linux/bitops.h>
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
#include <linux/reboot.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
@@ -160,6 +162,24 @@ void __init ar5312_arch_init_irq(void)
ar5312_misc_irq_domain = domain;
}
+static struct physmap_flash_data ar5312_flash_data = {
+ .width = 2,
+};
+
+static struct resource ar5312_flash_resource = {
+ .start = AR5312_FLASH_BASE,
+ .end = AR5312_FLASH_BASE + AR5312_FLASH_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ar5312_physmap_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev.platform_data = &ar5312_flash_data,
+ .resource = &ar5312_flash_resource,
+ .num_resources = 1,
+};
+
static void __init ar5312_flash_init(void)
{
void __iomem *flashctl_base;
@@ -168,12 +188,24 @@ static void __init ar5312_flash_init(void)
flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE,
AR5312_FLASHCTL_SIZE);
+ ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0);
+ ctl &= AR5312_FLASHCTL_MW;
+
+ /* fixup flash width */
+ switch (ctl) {
+ case AR5312_FLASHCTL_MW16:
+ ar5312_flash_data.width = 2;
+ break;
+ case AR5312_FLASHCTL_MW8:
+ default:
+ ar5312_flash_data.width = 1;
+ break;
+ }
+
/*
* Configure flash bank 0.
* Assume 8M window size. Flash will be aliased if it's smaller
*/
- ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0);
- ctl &= AR5312_FLASHCTL_MW;
ctl |= AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC_8M | AR5312_FLASHCTL_RBLE;
ctl |= 0x01 << AR5312_FLASHCTL_IDCY_S;
ctl |= 0x07 << AR5312_FLASHCTL_WST1_S;
@@ -212,6 +244,8 @@ void __init ar5312_init_devices(void)
/* Everything else is probably AR5312 or compatible */
else
ath25_soc = ATH25_SOC_AR5312;
+
+ platform_device_register(&ar5312_physmap_flash);
}
static void ar5312_restart(char *command)