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authorJonas Gorski <jogo@openwrt.org>2013-11-30 12:42:03 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 20:18:49 +0100
commit26b8c07f59ceff7b4ca40fb4bbc81abff01e8cf0 (patch)
treef5c1f75cb4c5cb55a7d007e6a80cf473952b5c18 /arch/mips/bcm63xx/clk.c
parent0ebe8aaefade244b224d65d1c83addea21dce4c3 (diff)
MIPS: BCM63XX: setup the HSSPI clock rate
Properly set up the HSSPI clock rate depending on the SoC's PLL rate. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6177/
Diffstat (limited to 'arch/mips/bcm63xx/clk.c')
-rw-r--r--arch/mips/bcm63xx/clk.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index 37a621a634ee..637565284732 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -390,3 +390,21 @@ void clk_put(struct clk *clk)
}
EXPORT_SYMBOL(clk_put);
+
+#define HSSPI_PLL_HZ_6328 133333333
+#define HSSPI_PLL_HZ_6362 400000000
+
+static int __init bcm63xx_clk_init(void)
+{
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
+ clk_hsspi.rate = HSSPI_PLL_HZ_6328;
+ break;
+ case BCM6362_CPU_ID:
+ clk_hsspi.rate = HSSPI_PLL_HZ_6362;
+ break;
+ }
+
+ return 0;
+}
+arch_initcall(bcm63xx_clk_init);