summaryrefslogtreecommitdiff
path: root/arch/mips/boot/dts/ingenic/jz4780.dtsi
diff options
context:
space:
mode:
authorPaul Cercueil <paul@crapouillou.net>2021-05-30 18:17:59 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-06-01 11:44:47 +0200
commiteb3849370ae32b571e1f9a63ba52c61adeaf88f7 (patch)
treee63a65e10df5d908983993742fc269d7892b4d81 /arch/mips/boot/dts/ingenic/jz4780.dtsi
parent63793d14137f81ed8d2b9f5376098325b659c476 (diff)
MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot/dts/ingenic/jz4780.dtsi')
0 files changed, 0 insertions, 0 deletions