diff options
| author | Álvaro Fernández Rojas <noltari@gmail.com> | 2020-06-17 12:50:40 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-11-17 21:53:23 +0100 |
| commit | b7aa228813bdf014d6ad173ca3abfced30f1ed37 (patch) | |
| tree | 9f1ff80c6e2f94e0e27eb5a258e682a36288fb5d /arch/mips/boot/dts | |
| parent | 7acf84e87857721d66a1ba800c2c50669089f43d (diff) | |
mips: bmips: dts: add BCM63268 reset controller support
BCM63268 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot/dts')
| -rw-r--r-- | arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index 5acb49b61867..e0021ff9f144 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -70,6 +70,12 @@ mask = <0x1>; }; + periph_rst: reset-controller@10000010 { + compatible = "brcm,bcm6345-reset"; + reg = <0x10000010 0x4>; + #reset-cells = <1>; + }; + periph_intc: interrupt-controller@10000020 { compatible = "brcm,bcm6345-l1-intc"; reg = <0x10000020 0x20>, |