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authorWu Zhangjin <wuzhangjin@gmail.com>2011-07-23 12:41:24 +0000
committerRalf Baechle <ralf@linux-mips.org>2011-09-21 17:52:15 +0200
commit5a4a4ad851dd8db2d888fb86c8bd946b2ae79f60 (patch)
tree2c0e09bcbdb784c7b94af8ae06c1beea1c803aee /arch/mips/dec
parent4d85f6afa43d366868fdaa19595722309e4843f6 (diff)
MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD
Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec')
-rw-r--r--arch/mips/dec/setup.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index fa45e924be05..f7b7ba6d5c45 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -101,20 +101,24 @@ int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU);
static struct irqaction ioirq = {
.handler = no_action,
.name = "cascade",
+ .flags = IRQF_NO_THREAD,
};
static struct irqaction fpuirq = {
.handler = no_action,
.name = "fpu",
+ .flags = IRQF_NO_THREAD,
};
static struct irqaction busirq = {
.flags = IRQF_DISABLED,
.name = "bus error",
+ .flags = IRQF_NO_THREAD,
};
static struct irqaction haltirq = {
.handler = dec_intr_halt,
.name = "halt",
+ .flags = IRQF_NO_THREAD,
};