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authorHassan Naveed <hnaveed@wavecomp.com>2018-10-29 18:27:41 -0700
committerPaul Burton <paul.burton@mips.com>2018-11-05 10:15:28 -0800
commitb3a428b4b18d495a06f39515568850f8db4c98ea (patch)
tree77c882b8cbe9c262855ebe5794a8c096ead8c96f /arch/mips/include/asm/io.h
parent67769857f05a3b6af79c990e53aa47f4c2b4a000 (diff)
MIPS: Enable IOREMAP_PROT config option for MIPS cpus
Allows the users of ptrace to access memory mapped by the ptraced process using the same cache coherency attributes as the original process. For example while using gdb with ioremap_prot() incorporated, both gdb and the process being traced will have same cache coherency attributes. Signed-off-by: Hassan Naveed <hnaveed@wavecomp.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20955/ Cc: <linux-mips@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/io.h')
-rw-r--r--arch/mips/include/asm/io.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 266257d56fb6..b5322f7386bf 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -218,6 +218,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
}
/*
+ * ioremap_prot - map bus memory into CPU space
+ * @offset: bus address of the memory
+ * @size: size of the resource to map
+
+ * ioremap_prot gives the caller control over cache coherency attributes (CCA)
+ */
+static inline void __iomem *ioremap_prot(phys_addr_t offset,
+ unsigned long size, unsigned long prot_val) {
+ return __ioremap_mode(offset, size, prot_val & _CACHE_MASK);
+}
+
+/*
* ioremap - map bus memory into CPU space
* @offset: bus address of the memory
* @size: size of the resource to map