diff options
| author | John Crispin <blogic@openwrt.org> | 2012-04-17 15:53:19 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-21 14:31:51 +0100 |
| commit | 287e3f3f4e68ca881e3faa413e7aa114fee609d3 (patch) | |
| tree | f33d5e8b76c50306eee6540570b39d5bcd92210f /arch/mips/include/asm/mach-lantiq | |
| parent | bd51db7f3bf2ba23ff55f6d5fdcec04c74df13e4 (diff) | |
MIPS: lantiq: implement support for clkdev api
This patch unifies all clock generation and gating code into one file.
All drivers will now be able to request their clocks via their device.
This patch also adds support for the clockout feature, which allows
clock generation on external pins.
Support for COMMON_CLK will be provided in the next series.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-lantiq')
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/lantiq.h | 27 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 5 |
2 files changed, 17 insertions, 15 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h index 7a90190bc387..6775d2402cd0 100644 --- a/arch/mips/include/asm/mach-lantiq/lantiq.h +++ b/arch/mips/include/asm/mach-lantiq/lantiq.h @@ -9,6 +9,8 @@ #define _LANTIQ_H__ #include <linux/irq.h> +#include <linux/device.h> +#include <linux/clk.h> /* generic reg access functions */ #define ltq_r32(reg) __raw_readl(reg) @@ -21,26 +23,13 @@ /* register access macros for EBU and CGU */ #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y)) #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x)) -#define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y)) -#define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x)) - +#define ltq_ebu_w32_mask(x, y, z) \ + ltq_w32_mask(x, y, ltq_ebu_membase + (z)) extern __iomem void *ltq_ebu_membase; -extern __iomem void *ltq_cgu_membase; extern unsigned int ltq_get_cpu_ver(void); extern unsigned int ltq_get_soc_type(void); -/* clock speeds */ -#define CLOCK_60M 60000000 -#define CLOCK_83M 83333333 -#define CLOCK_111M 111111111 -#define CLOCK_133M 133333333 -#define CLOCK_167M 166666667 -#define CLOCK_200M 200000000 -#define CLOCK_266M 266666666 -#define CLOCK_333M 333333333 -#define CLOCK_400M 400000000 - /* spinlock all ebu i/o */ extern spinlock_t ebu_lock; @@ -48,6 +37,14 @@ extern spinlock_t ebu_lock; extern void ltq_disable_irq(struct irq_data *data); extern void ltq_mask_and_ack_irq(struct irq_data *data); extern void ltq_enable_irq(struct irq_data *data); + +/* clock handling */ +extern int clk_activate(struct clk *clk); +extern void clk_deactivate(struct clk *clk); +extern struct clk *clk_get_cpu(void); +extern struct clk *clk_get_fpi(void); +extern struct clk *clk_get_io(void); + /* find out what bootsource we have */ extern unsigned char ltq_boot_select(void); /* find out what caused the last cpu reset */ diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h index 150c7bef5a14..b5a2acf9156f 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h @@ -59,6 +59,11 @@ #define BS_NAND 0x6 #define BS_RMII0 0x7 +/* helpers used to access the cgu */ +#define ltq_cgu_w32(x, y) ltq_w32((x), ltq_cgu_membase + (y)) +#define ltq_cgu_r32(x) ltq_r32(ltq_cgu_membase + (x)) +extern __iomem void *ltq_cgu_membase; + /* * during early_printk no ioremap is possible * lets use KSEG1 instead |