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| author | Mark Brown <broonie@kernel.org> | 2021-10-18 13:50:42 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-10-18 13:50:42 +0100 |
| commit | b8f3b564937c1f3529bc4897cc41c5d95d2cdbe9 (patch) | |
| tree | b71ed4906bbe2ca96d68dbf1d6d6f0fe2676f1de /arch/mips/include/asm/mips-cps.h | |
| parent | 4e52cb9e2c22c9d860910794c82461064baadd9f (diff) | |
| parent | 519d81956ee277b4419c723adfb154603c2565ba (diff) | |
Merge tag 'v5.15-rc6' into asoc-5.16
Linux 5.15-rc6
Diffstat (limited to 'arch/mips/include/asm/mips-cps.h')
| -rw-r--r-- | arch/mips/include/asm/mips-cps.h | 23 |
1 files changed, 1 insertions, 22 deletions
diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h index 35fb8ee6dd33..fd43d876892e 100644 --- a/arch/mips/include/asm/mips-cps.h +++ b/arch/mips/include/asm/mips-cps.h @@ -10,8 +10,6 @@ #include <linux/io.h> #include <linux/types.h> -#include <asm/mips-boards/launch.h> - extern unsigned long __cps_access_bad_size(void) __compiletime_error("Bad size for CPS accessor"); @@ -167,30 +165,11 @@ static inline uint64_t mips_cps_cluster_config(unsigned int cluster) */ static inline unsigned int mips_cps_numcores(unsigned int cluster) { - unsigned int ncores; - if (!mips_cm_present()) return 0; /* Add one before masking to handle 0xff indicating no cores */ - ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES; - - if (IS_ENABLED(CONFIG_SOC_MT7621)) { - struct cpulaunch *launch; - - /* - * Ralink MT7621S SoC is single core, but the GCR_CONFIG method - * always reports 2 cores. Check the second core's LAUNCH_FREADY - * flag to detect if the second core is missing. This method - * only works before the core has been started. - */ - launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); - launch += 2; /* MT7621 has 2 VPEs per core */ - if (!(launch->flags & LAUNCH_FREADY)) - ncores = 1; - } - - return ncores; + return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES; } /** |