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authorPaul Burton <paul.burton@imgtec.com>2014-03-16 16:21:34 +0000
committerPaul Burton <paul.burton@imgtec.com>2014-05-28 16:20:22 +0100
commit27476f3bf45cf61976bc85b66a0bcd0019feae41 (patch)
tree38707aa25a9e4e32290346d6b2b45208a4e15e7e /arch/mips/include/asm/mipsmtregs.h
parente2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce (diff)
MIPS: MT: define write_c0_tchalt macro
Define a macro to write to the current TCs TCHalt register. This will be used by a subsequent patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/mipsmtregs.h')
-rw-r--r--arch/mips/include/asm/mipsmtregs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h
index 6efa79a27b6a..5f8052ce43bf 100644
--- a/arch/mips/include/asm/mipsmtregs.h
+++ b/arch/mips/include/asm/mipsmtregs.h
@@ -36,6 +36,8 @@
#define read_c0_tcbind() __read_32bit_c0_register($2, 2)
+#define write_c0_tchalt(val) __write_32bit_c0_register($2, 4, val)
+
#define read_c0_tccontext() __read_32bit_c0_register($2, 5)
#define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val)