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authorWANG Xuerui <git@xen0n.name>2020-07-29 21:14:15 +0800
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-07-31 17:52:10 +0200
commitefd1b4ad3d5178a74387bc5ff69a2d4585f586c6 (patch)
tree820e92edafd43538e37075f9a19c78a563302a16 /arch/mips/include/asm/mipsregs.h
parent48f5dd56cf2980ff932c6fd98ff5a2c503cde97b (diff)
MIPS: only register FTLBPar exception handler for supported models
Previously ExcCode 16 is unconditionally treated as the FTLB parity exception (FTLBPar), but in fact its semantic is implementation- dependent. Looking at various manuals it seems the FTLBPar exception is only present on some recent MIPS Technologies cores, so only register the handler on these. Fixes: 75b5b5e0a262790f ("MIPS: Add support for FTLBs") Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: WANG Xuerui <git@xen0n.name> Cc: Paul Burton <paulburton@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
0 files changed, 0 insertions, 0 deletions