diff options
| author | David Daney <david.daney@cavium.com> | 2016-02-09 11:00:12 -0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 14:01:41 +0200 |
| commit | c6d2b22eb5211e96e932428bc1183c6ad57d5e54 (patch) | |
| tree | 9f0fba6e78f38b3a4bcc02be2690818374b301b0 /arch/mips/include/asm/octeon/octeon.h | |
| parent | ce210d35bb93c2c5c8857878123275ecdcfd7018 (diff) | |
MIPS: OCTEON: Add SMP support for OCTEON cn78xx et al.
OCTEON chips with the CIU3 interrupt controller use a different IPI
mechanism that previous models.
Add plat_smp_ops for the cn78xx and probing code to choose between the
two types of ops.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/octeon/octeon.h')
| -rw-r--r-- | arch/mips/include/asm/octeon/octeon.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 53d51aeb9140..07c0516ef4d5 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -299,6 +299,12 @@ static inline void octeon_npi_write32(uint64_t address, uint32_t val) cvmx_read64_uint32(address ^ 4); } +#ifdef CONFIG_SMP +void octeon_setup_smp(void); +#else +static inline void octeon_setup_smp(void) {} +#endif + struct irq_domain; struct device_node; struct irq_data; |