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authorDeng-Cheng Zhu <dengcheng.zhu@imgtec.com>2014-06-26 12:11:34 -0700
committerPaolo Bonzini <pbonzini@redhat.com>2014-06-30 16:52:01 +0200
commitd116e812f9026e3cca46ce1009e577afec62916d (patch)
tree2a8f60c6beb6c5489d777cb0e2b8a92cf42127b0 /arch/mips/include/asm/r4kcache.h
parent85949977a5b499efca661fb80993693acbfac64d (diff)
MIPS: KVM: Reformat code and comments
No logic changes inside. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/include/asm/r4kcache.h')
-rw-r--r--arch/mips/include/asm/r4kcache.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 0b8bd28a0df1..4520adc8699b 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -19,6 +19,9 @@
#include <asm/mipsmtregs.h>
#include <asm/uaccess.h> /* for segment_eq() */
+extern void (*r4k_blast_dcache)(void);
+extern void (*r4k_blast_icache)(void);
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here: