diff options
| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-23 13:38:45 +0100 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-23 13:38:45 +0100 |
| commit | 96b6eb8a77dab6ae7eff59c8d2f15e2b92a46552 (patch) | |
| tree | 6a82740ce264dbbd5611c9f7891d354499d849f7 /arch/mips/include/asm | |
| parent | 1e07c876ab759954627c13876a5353a06711bf3e (diff) | |
| parent | f7d5f5655ef7e5d2a128f6696ac35256e83b119b (diff) | |
Merge tag 'mips_fixes_5.6.1' into mips-next
Pull in mips-fixes avoiding conflicts with more CI20 DT changes.
A few MIPS fixes:
- DT fixes for CI20
- Fix command line handling
- Correct patchwork URL
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm')
| -rw-r--r-- | arch/mips/include/asm/sync.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/sync.h b/arch/mips/include/asm/sync.h index 7c6a1095f556..aabd097933fe 100644 --- a/arch/mips/include/asm/sync.h +++ b/arch/mips/include/asm/sync.h @@ -155,9 +155,11 @@ * effective barrier as noted by commit 6b07d38aaa52 ("MIPS: Octeon: Use * optimized memory barrier primitives."). Here we specify that the affected * sync instructions should be emitted twice. + * Note that this expression is evaluated by the assembler (not the compiler), + * and that the assembler evaluates '==' as 0 or -1, not 0 or 1. */ #ifdef CONFIG_CPU_CAVIUM_OCTEON -# define __SYNC_rpt(type) (1 + (type == __SYNC_wmb)) +# define __SYNC_rpt(type) (1 - (type == __SYNC_wmb)) #else # define __SYNC_rpt(type) 1 #endif |