diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 12:59:30 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 10:00:22 +0100 |
| commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
| tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/include/uapi/asm/cachectl.h | |
| parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) | |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/uapi/asm/cachectl.h')
| -rw-r--r-- | arch/mips/include/uapi/asm/cachectl.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/include/uapi/asm/cachectl.h b/arch/mips/include/uapi/asm/cachectl.h index f3ce721861d3..230390908773 100644 --- a/arch/mips/include/uapi/asm/cachectl.h +++ b/arch/mips/include/uapi/asm/cachectl.h @@ -5,15 +5,15 @@ * * Copyright (C) 1994, 1995, 1996 by Ralf Baechle */ -#ifndef _ASM_CACHECTL -#define _ASM_CACHECTL +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL /* * Options for cacheflush system call */ -#define ICACHE (1<<0) /* flush instruction cache */ -#define DCACHE (1<<1) /* writeback and flush data cache */ -#define BCACHE (ICACHE|DCACHE) /* flush both caches */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ /* * Caching modes for the cachectl(2) call |