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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-03-23 08:01:20 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-03-23 08:01:20 +0100 |
| commit | 6203da9803017701da5782998157d9826215059d (patch) | |
| tree | 1d754f139ac25c643e88f429966606d3b44e431f /arch/mips/include | |
| parent | 3017e587e36819f87e53d3c8751afdf987c1f542 (diff) | |
| parent | 16fbf79b0f83bc752cee8589279f1ebfe57b3b6e (diff) | |
Merge 5.6-rc7 into staging-next
We need the staging/iio fixes in here as well
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/sync.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/sync.h b/arch/mips/include/asm/sync.h index 7c6a1095f556..aabd097933fe 100644 --- a/arch/mips/include/asm/sync.h +++ b/arch/mips/include/asm/sync.h @@ -155,9 +155,11 @@ * effective barrier as noted by commit 6b07d38aaa52 ("MIPS: Octeon: Use * optimized memory barrier primitives."). Here we specify that the affected * sync instructions should be emitted twice. + * Note that this expression is evaluated by the assembler (not the compiler), + * and that the assembler evaluates '==' as 0 or -1, not 0 or 1. */ #ifdef CONFIG_CPU_CAVIUM_OCTEON -# define __SYNC_rpt(type) (1 + (type == __SYNC_wmb)) +# define __SYNC_rpt(type) (1 - (type == __SYNC_wmb)) #else # define __SYNC_rpt(type) 1 #endif |