diff options
| author | Keguang Zhang <keguang.zhang@gmail.com> | 2023-05-12 18:37:22 +0800 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2023-06-19 17:06:55 +0200 |
| commit | 9e130e2be4e7ac54de1ecc3fa424ca7ddfb1a748 (patch) | |
| tree | 04f891ef8570eb024401171b0364a73b0224db86 /arch/mips/include | |
| parent | ea95051063f95bf612683f5697e44604d0cbd0f1 (diff) | |
MIPS: Loongson32: Remove deprecated PWM timer clocksource
The Loongson1 PWM timer will be moved to clocksource framework.
Then, the old driver is no longer needed.
Remove the deprecated code and update the Kconfig.
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230512103724.587760-2-keguang.zhang@gmail.com
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mach-loongson32/loongson1.h | 1 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-loongson32/regs-pwm.h | 25 |
2 files changed, 0 insertions, 26 deletions
diff --git a/arch/mips/include/asm/mach-loongson32/loongson1.h b/arch/mips/include/asm/mach-loongson32/loongson1.h index eb3ddbec1752..d8f9dec0ecc3 100644 --- a/arch/mips/include/asm/mach-loongson32/loongson1.h +++ b/arch/mips/include/asm/mach-loongson32/loongson1.h @@ -47,7 +47,6 @@ #include <regs-clk.h> #include <regs-mux.h> -#include <regs-pwm.h> #include <regs-rtc.h> #include <regs-wdt.h> diff --git a/arch/mips/include/asm/mach-loongson32/regs-pwm.h b/arch/mips/include/asm/mach-loongson32/regs-pwm.h deleted file mode 100644 index ec870c82d492..000000000000 --- a/arch/mips/include/asm/mach-loongson32/regs-pwm.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2014 Zhang, Keguang <keguang.zhang@gmail.com> - * - * Loongson 1 PWM Register Definitions. - */ - -#ifndef __ASM_MACH_LOONGSON32_REGS_PWM_H -#define __ASM_MACH_LOONGSON32_REGS_PWM_H - -/* Loongson 1 PWM Timer Register Definitions */ -#define PWM_CNT 0x0 -#define PWM_HRC 0x4 -#define PWM_LRC 0x8 -#define PWM_CTRL 0xc - -/* PWM Control Register Bits */ -#define CNT_RST BIT(7) -#define INT_SR BIT(6) -#define INT_EN BIT(5) -#define PWM_SINGLE BIT(4) -#define PWM_OE BIT(3) -#define CNT_EN BIT(0) - -#endif /* __ASM_MACH_LOONGSON32_REGS_PWM_H */ |