diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-02-13 11:27:42 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:11 +0100 |
| commit | eec43a224cf198c7e3538fca16f689e4d17d4471 (patch) | |
| tree | 24d9236c0cd33dcf7862c09799910e8bbf5abde9 /arch/mips/kernel/asm-offsets.c | |
| parent | a8ad136789b4256fa372d59daaddb91b72aa0753 (diff) | |
MIPS: Save/restore MSA context around signals
This patch extends sigcontext in order to hold the most significant 64
bits of each vector register in addition to the MSA control & status
register. The least significant 64 bits are already saved as the scalar
FP context. This makes things a little awkward since the least & most
significant 64 bits of each vector register are not contiguous in
memory. Thus the copy_u & insert instructions are used to transfer the
values of the most significant 64 bits via GP registers.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6533/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/asm-offsets.c')
| -rw-r--r-- | arch/mips/kernel/asm-offsets.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 7ff80622c8d9..0ea75c244b48 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -295,6 +295,7 @@ void output_sc_defines(void) OFFSET(SC_LO2, sigcontext, sc_lo2); OFFSET(SC_HI3, sigcontext, sc_hi3); OFFSET(SC_LO3, sigcontext, sc_lo3); + OFFSET(SC_MSAREGS, sigcontext, sc_msaregs); BLANK(); } #endif @@ -309,6 +310,7 @@ void output_sc_defines(void) OFFSET(SC_MDLO, sigcontext, sc_mdlo); OFFSET(SC_PC, sigcontext, sc_pc); OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr); + OFFSET(SC_MSAREGS, sigcontext, sc_msaregs); BLANK(); } #endif @@ -320,6 +322,7 @@ void output_sc32_defines(void) OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs); OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr); OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir); + OFFSET(SC32_MSAREGS, sigcontext32, sc_msaregs); BLANK(); } #endif |