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authorPaul Burton <paul.burton@mips.com>2018-11-07 23:13:59 +0000
committerPaul Burton <paul.burton@mips.com>2018-11-09 10:23:13 -0800
commitcc97ab235f3fe32401ca198cebe6f42642e95770 (patch)
treeb684dffbe9cead6178d44c32cbc2c9aa5c4c0ba6 /arch/mips/kernel/mips-r2-to-r6-emul.c
parentb1013f1e95d59c238423f4127ae0a85851a4bdd7 (diff)
MIPS: Simplify FP context initialization
MIPS has up until now had 3 different ways for a task's floating point context to be initialized: - If the task's first use of FP involves it gaining ownership of an FPU then _init_fpu() is used to initialize the FPU's registers such that they all contain ~0, and the FPU registers will be stored to struct thread_info later (eg. when context switching). - If the task first uses FP on a CPU without an associated FPU then fpu_emulator_init_fpu() initializes the task's floating point register state in struct thread_info such that all floating point register contain the bit pattern 0x7ff800007ff80000, different to the _init_fpu() behaviour. - If a task's floating point context is first accessed via ptrace then init_fp_ctx() initializes the floating point register state in struct thread_info to ~0, giving equivalent state to _init_fpu(). The _init_fpu() path has 2 separate implementations - one for r2k/r3k style systems & one for r4k style systems. The _init_fpu() path also requires that we be careful to clear & restore the value of the Config5.FRE bit on modern systems in order to avoid inadvertently triggering floating point exceptions. None of this code is in a performance critical hot path - it runs only the first time a task uses floating point. As such it doesn't seem to warrant the complications of maintaining the _init_fpu() path. Remove _init_fpu() & fpu_emulator_init_fpu(), instead using init_fp_ctx() consistently to initialize floating point register state in struct thread_info. Upon a task's first use of floating point this will typically mean that we initialize state in memory & then load it into FPU registers using _restore_fp() just as we would on a context switch. For other paths such as __compute_return_epc_for_insn() or mipsr2_decoder() this results in a significant simplification of the work to be done. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21002/ Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips/kernel/mips-r2-to-r6-emul.c')
-rw-r--r--arch/mips/kernel/mips-r2-to-r6-emul.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/kernel/mips-r2-to-r6-emul.c b/arch/mips/kernel/mips-r2-to-r6-emul.c
index 28cb88daa3ef..6092cdf7f8d9 100644
--- a/arch/mips/kernel/mips-r2-to-r6-emul.c
+++ b/arch/mips/kernel/mips-r2-to-r6-emul.c
@@ -1174,13 +1174,9 @@ repeat:
fpu_emul:
regs->regs[31] = r31;
regs->cp0_epc = epc;
- if (!used_math()) { /* First time FPU user. */
- preempt_disable();
- err = init_fpu();
- preempt_enable();
- set_used_math();
- }
- lose_fpu(1); /* Save FPU state for the emulator. */
+
+ if (!init_fp_ctx(current))
+ lose_fpu(1);
err = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 0,
&fault_addr);