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authorGregory Fong <gregory.0xf0@gmail.com>2013-06-17 19:36:07 +0000
committerRalf Baechle <ralf@linux-mips.org>2013-07-01 15:10:52 +0200
commit1400eb656760d14274ed08e45824ccbcc366585b (patch)
treee987890f85581753d951d917e2a9db0b3592b667 /arch/mips/kernel/r4k_switch.S
parent36ecafc5ad17861e2bc1fb12af4cc97680e25942 (diff)
MIPS: r4k,octeon,r2300: stack protector: change canary per task
For non-SMP, uses the new random canary value that is stored in the task struct whenever a new task is forked. Based on ARM version in df0698be14c6683606d5df2d83e3ae40f85ed0d9 and subject to the same limitations: the variable GCC expects, __stack_chk_guard, is global, so this will not work on SMP. Quoting Nicolas Pitre <nico@fluxnic.net>: "One way to overcome this GCC limitation would be to locate the __stack_chk_guard variable into a memory page of its own for each CPU, and then use TLB locking to have each CPU see its own page at the same virtual address for each of them." Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5488/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/r4k_switch.S')
-rw-r--r--arch/mips/kernel/r4k_switch.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 5e51219990aa..921238a6bd26 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -68,6 +68,12 @@
# clobbers t1
1:
+#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
+ PTR_L t8, __stack_chk_guard
+ LONG_L t9, TASK_STACK_CANARY(a1)
+ LONG_S t9, 0(t8)
+#endif
+
/*
* The order of restoring the registers takes care of the race
* updating $28, $29 and kernelsp without disabling ints.