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authorJames Hogan <james.hogan@imgtec.com>2015-07-15 16:17:45 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-09-03 12:07:48 +0200
commit5d3c3c7d296d9622560558de96875cf694d96f58 (patch)
tree57c83572647179b396e7794d924120115b153dd1 /arch/mips/lib
parentaaa7be48fdbf14836ff1bc61c72969960a5923c6 (diff)
MIPS: dump_tlb: Only dump PageGrain if interesting
The PageGrain register may not exist if certain architectural features aren't present, therefore only print out its value when dumping the TLB registers if it is expected to contain fields relevant to the TLB. Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs") Reported-by: Joshua Kinard <kumba@gentoo.org> Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib')
-rw-r--r--arch/mips/lib/dump_tlb.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 519ededbf9a4..2ab83be14ffa 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -23,7 +23,8 @@ void dump_tlb_regs(void)
pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
pr_info("Wired : %0x\n", read_c0_wired());
- pr_info("PageGrain: %0x\n", read_c0_pagegrain());
+ if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
+ pr_info("PageGrain: %0x\n", read_c0_pagegrain());
if (cpu_has_htw) {
pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());