diff options
| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2019-10-20 22:43:14 +0800 |
|---|---|---|
| committer | Paul Burton <paulburton@kernel.org> | 2019-11-01 14:30:52 -0700 |
| commit | 71e2f4dd5a65bd8dbca0b77661e75eea471168f8 (patch) | |
| tree | e7107d2996f7ba8ec282190a49c557598acd6f88 /arch/mips/loongson2ef/common/uart_base.c | |
| parent | 268a2d60013049cfd9a0aada77284aa6ea8ad26a (diff) | |
MIPS: Fork loongson2ef from loongson64
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we separate loongson2e/f support code out of mach-loongson64
to make our life easier.
This patch contains mostly file moving works.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
[paulburton@kernel.org: Squash in the MAINTAINERS updates]
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
Diffstat (limited to 'arch/mips/loongson2ef/common/uart_base.c')
| -rw-r--r-- | arch/mips/loongson2ef/common/uart_base.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/mips/loongson2ef/common/uart_base.c b/arch/mips/loongson2ef/common/uart_base.c new file mode 100644 index 000000000000..e88d937f10fe --- /dev/null +++ b/arch/mips/loongson2ef/common/uart_base.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2009 Lemote Inc. + * Author: Wu Zhangjin, wuzhangjin@gmail.com + */ + +#include <linux/export.h> +#include <asm/bootinfo.h> + +#include <loongson.h> + +/* raw */ +unsigned long loongson_uart_base[MAX_UARTS] = {}; +/* ioremapped */ +unsigned long _loongson_uart_base[MAX_UARTS] = {}; + +EXPORT_SYMBOL(loongson_uart_base); +EXPORT_SYMBOL(_loongson_uart_base); + +void prom_init_loongson_uart_base(void) +{ + switch (mips_machtype) { + case MACH_LOONGSON_GENERIC: + /* The CPU provided serial port (CPU) */ + loongson_uart_base[0] = LOONGSON_REG_BASE + 0x1e0; + break; + case MACH_LEMOTE_FL2E: + loongson_uart_base[0] = LOONGSON_PCIIO_BASE + 0x3f8; + break; + case MACH_LEMOTE_FL2F: + case MACH_LEMOTE_LL2F: + loongson_uart_base[0] = LOONGSON_PCIIO_BASE + 0x2f8; + break; + case MACH_LEMOTE_ML2F7: + case MACH_LEMOTE_YL2F89: + case MACH_DEXXON_GDIUM2F10: + case MACH_LEMOTE_NAS: + default: + /* The CPU provided serial port (LPC) */ + loongson_uart_base[0] = LOONGSON_LIO1_BASE + 0x3f8; + break; + } + + _loongson_uart_base[0] = + (unsigned long)ioremap_nocache(loongson_uart_base[0], 8); +} |