diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2017-08-12 21:36:34 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-09-04 13:53:14 +0200 |
| commit | 72eb29951f98f612ba5a5bb8c58c87eaf8fb7351 (patch) | |
| tree | a25e73a3318aba7823126417503c3565fe900dba /arch/mips/mti-malta/malta-int.c | |
| parent | 85eec73ce4c4322b3b442b9582f6656abb5d125f (diff) | |
MIPS: Use mips_gic_present() in place of gic_present
In preparation for removing the gic_present global variable, switch to
using the mips_gic_present() function instead. For the most part this is
a straightforward substitution. In cases which previously wrapped the
GIC case in an #ifdef CONFIG_MIPS_GIC that #ifdef has been removed,
since mips_gic_present() will return a compile-time constant false
allowing the affected code to be optimised out anyway.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17044/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta/malta-int.c')
| -rw-r--r-- | arch/mips/mti-malta/malta-int.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 2e831f4abfb3..a840e0c1642c 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -19,7 +19,6 @@ #include <linux/smp.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <linux/irqchip/mips-gic.h> #include <linux/of_irq.h> #include <linux/kernel_stat.h> #include <linux/kernel.h> @@ -31,6 +30,7 @@ #include <asm/irq_regs.h> #include <asm/mips-boards/malta.h> #include <asm/mips-boards/maltaint.h> +#include <asm/mips-cps.h> #include <asm/gt64120.h> #include <asm/mips-boards/generic.h> #include <asm/mips-boards/msc01_pci.h> @@ -214,7 +214,7 @@ void __init arch_init_irq(void) msc_nr_irqs); } - if (gic_present) { + if (mips_gic_present()) { corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI; } else if (cpu_has_veic) { set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch); |