diff options
| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2014-01-17 13:11:29 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:20 +0100 |
| commit | 2f284eac283704429f94c828d98a370c4a8f8926 (patch) | |
| tree | 61ce76614195d4f3a9b2d86bb81182591fb40649 /arch/mips/mti-malta | |
| parent | d1965c06160b5c1b00a683ff083d875aa0ebb341 (diff) | |
MIPS: malta: malta-init: Fix System Controller memory mapping for EVA
Shift System Controller memory mapping to 0x80000000
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/mti-malta')
| -rw-r--r-- | arch/mips/mti-malta/malta-init.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index eebb2d1538c6..4f9e44d358b7 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c @@ -244,10 +244,23 @@ mips_pci_controller: MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF | MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF); #endif +#ifndef CONFIG_EVA /* Fix up target memory mapping. */ MSC_READ(MSC01_PCI_BAR0, mask); MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK); +#else + /* + * Setup the Malta max (2GB) memory for PCI DMA in host bridge + * in transparent addressing mode, starting from 0x80000000. + */ + mask = PHYS_OFFSET | (1<<3); + MSC_WRITE(MSC01_PCI_BAR0, mask); + mask = PHYS_OFFSET; + MSC_WRITE(MSC01_PCI_HEAD4, mask); + MSC_WRITE(MSC01_PCI_P2SCMSKL, mask); + MSC_WRITE(MSC01_PCI_P2SCMAPL, mask); +#endif /* Don't handle target retries indefinitely. */ if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) == MSC01_PCI_CFG_MAXRTRY_MSK) |