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authorJames Hogan <james.hogan@imgtec.com>2017-02-06 12:37:45 +0000
committerJames Hogan <james.hogan@imgtec.com>2017-02-14 09:00:24 +0000
commit2654294bac83a64101c360eac4d42d5ac1b1b911 (patch)
treed9c935f7bfdd0451d05df9bdf68f4894201a3b09 /arch/mips/oprofile
parent573deec09436c9136fff6d78e0325e052a1ad6be (diff)
MIPS: Unify perf counter register definitions
Unify definitions for MIPS performance counter register fields in mipsregs.h rather than duplicating them in perf_events and oprofile. This will allow future patches to use them to expose performance counters to KVM guests. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Robert Richter <rric@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: oprofile-list@lists.sf.net Patchwork: https://patchwork.linux-mips.org/patch/15212/ Signed-off-by: James Hogan <james.hogan@imgtec.com>
Diffstat (limited to 'arch/mips/oprofile')
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c40
1 files changed, 13 insertions, 27 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 45cb27469fba..c57da6f13929 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -15,26 +15,12 @@
#include "op_impl.h"
-#define M_PERFCTL_EXL (1UL << 0)
-#define M_PERFCTL_KERNEL (1UL << 1)
-#define M_PERFCTL_SUPERVISOR (1UL << 2)
-#define M_PERFCTL_USER (1UL << 3)
-#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
-#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5)
-#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
-#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
-#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)
-#define M_TC_EN_VPE M_PERFCTL_MT_EN(1)
-#define M_TC_EN_TC M_PERFCTL_MT_EN(2)
-#define M_PERFCTL_TCID(tcid) ((tcid) << 22)
-#define M_PERFCTL_WIDE (1UL << 30)
-#define M_PERFCTL_MORE (1UL << 31)
+#define M_PERFCTL_EVENT(event) (((event) << MIPS_PERFCTRL_EVENT_S) & \
+ MIPS_PERFCTRL_EVENT)
+#define M_PERFCTL_VPEID(vpe) ((vpe) << MIPS_PERFCTRL_VPEID_S)
#define M_COUNTER_OVERFLOW (1UL << 31)
-/* Netlogic XLR specific, count events in all threads in a core */
-#define M_PERFCTL_COUNT_ALL_THREADS (1UL << 13)
-
static int (*save_perf_irq)(void);
static int perfcount_irq;
@@ -51,7 +37,7 @@ static int perfcount_irq;
#ifdef CONFIG_MIPS_MT_SMP
static int cpu_has_mipsmt_pertccounters;
-#define WHAT (M_TC_EN_VPE | \
+#define WHAT (MIPS_PERFCTRL_MT_EN_VPE | \
M_PERFCTL_VPEID(cpu_data[smp_processor_id()].vpe_id))
#define vpe_id() (cpu_has_mipsmt_pertccounters ? \
0 : cpu_data[smp_processor_id()].vpe_id)
@@ -161,15 +147,15 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
continue;
reg.control[i] = M_PERFCTL_EVENT(ctr[i].event) |
- M_PERFCTL_INTERRUPT_ENABLE;
+ MIPS_PERFCTRL_IE;
if (ctr[i].kernel)
- reg.control[i] |= M_PERFCTL_KERNEL;
+ reg.control[i] |= MIPS_PERFCTRL_K;
if (ctr[i].user)
- reg.control[i] |= M_PERFCTL_USER;
+ reg.control[i] |= MIPS_PERFCTRL_U;
if (ctr[i].exl)
- reg.control[i] |= M_PERFCTL_EXL;
+ reg.control[i] |= MIPS_PERFCTRL_EXL;
if (boot_cpu_type() == CPU_XLR)
- reg.control[i] |= M_PERFCTL_COUNT_ALL_THREADS;
+ reg.control[i] |= XLR_PERFCTRL_ALLTHREADS;
reg.counter[i] = 0x80000000 - ctr[i].count;
}
}
@@ -254,7 +240,7 @@ static int mipsxx_perfcount_handler(void)
case n + 1: \
control = r_c0_perfctrl ## n(); \
counter = r_c0_perfcntr ## n(); \
- if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
+ if ((control & MIPS_PERFCTRL_IE) && \
(counter & M_COUNTER_OVERFLOW)) { \
oprofile_add_sample(get_irq_regs(), n); \
w_c0_perfcntr ## n(reg.counter[n]); \
@@ -273,11 +259,11 @@ static inline int __n_counters(void)
{
if (!cpu_has_perf)
return 0;
- if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
+ if (!(read_c0_perfctrl0() & MIPS_PERFCTRL_M))
return 1;
- if (!(read_c0_perfctrl1() & M_PERFCTL_MORE))
+ if (!(read_c0_perfctrl1() & MIPS_PERFCTRL_M))
return 2;
- if (!(read_c0_perfctrl2() & M_PERFCTL_MORE))
+ if (!(read_c0_perfctrl2() & MIPS_PERFCTRL_M))
return 3;
return 4;