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authorArınç ÜNAL <arinc.unal@arinc9.com>2023-02-21 12:24:35 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2023-02-27 23:47:29 +0100
commit27fd82726995bd75b68df9ce6a1eda8f6b3ad498 (patch)
tree9a07aa243a8c81d67bf7389018a8d0b220245910 /arch/mips/ralink
parentf2b95d7a9fa43bd72d442a9df01e29274b1769b2 (diff)
mips: ralink: make SOC_MT7621 select PINCTRL
Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC uses pinctrl. Because of this, PINCTRL is not selected at all. Make SOC_MT7621 select PINCTRL. Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under the PINCTRL_MT7621 option. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 06031796c87b..83e61e147b90 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -54,7 +54,7 @@ choice
select HAVE_PCI
select PCI_DRIVERS_GENERIC
select SOC_BUS
- select PINCTRL_MT7621
+ select PINCTRL
help
The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc