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authorHuacai Chen <chenhc@lemote.com>2020-06-15 14:04:16 +0800
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-07-08 11:23:26 +0200
commitf8523d0e83613ab8d082cd504dc53a09fbba4889 (patch)
tree804850e9fe98651a80bfc56a8cf3997552d8225c /arch/mips
parent925a567542c52db771c3659b4477bec03f15ea6b (diff)
MIPS: Loongson: Rename CPU device-tree binding
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit Loongson processors are called Loongson64C (C for classic, pre Loongson- 3A R4), and the new 64bit Loongson processors are called Loongson64G (G for generic, Loongson-3A R4+). To keep consistency and make extensible, we rename the classic "loongson3" prefix to "loongson64c", and the new prefix for Loongson-3A R4+ will be "loongson64g". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/loongson/Makefile2
-rw-r--r--arch/mips/boot/dts/loongson/loongson64c-package.dtsi (renamed from arch/mips/boot/dts/loongson/loongson3-package.dtsi)0
-rw-r--r--arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts (renamed from arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts)2
-rw-r--r--arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts (renamed from arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts)2
-rw-r--r--arch/mips/include/asm/mach-loongson64/builtin_dtbs.h4
-rw-r--r--arch/mips/loongson64/env.c4
6 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile
index 56d379471262..aa5069a05da9 100644
--- a/arch/mips/boot/dts/loongson/Makefile
+++ b/arch/mips/boot/dts/loongson/Makefile
@@ -1,4 +1,4 @@
# SPDX_License_Identifier: GPL_2.0
-dtb-$(CONFIG_MACH_LOONGSON64) += loongson3_4core_rs780e.dtb loongson3_8core_rs780e.dtb
+dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb loongson64c_8core_rs780e.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/mips/boot/dts/loongson/loongson3-package.dtsi b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
index 5bb876a4de52..5bb876a4de52 100644
--- a/arch/mips/boot/dts/loongson/loongson3-package.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
diff --git a/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts
index 6b5694ca0f95..acd53a13cc7a 100644
--- a/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts
+++ b/arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts
@@ -2,7 +2,7 @@
/dts-v1/;
-#include "loongson3-package.dtsi"
+#include "loongson64c-package.dtsi"
#include "rs780e-pch.dtsi"
/ {
diff --git a/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts
index ffefa2f829b0..433f9c3d01b8 100644
--- a/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts
+++ b/arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts
@@ -2,7 +2,7 @@
/dts-v1/;
-#include "loongson3-package.dtsi"
+#include "loongson64c-package.dtsi"
#include "rs780e-pch.dtsi"
/ {
diff --git a/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h b/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h
index 853c6d80887b..930c8a1c1e21 100644
--- a/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h
+++ b/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h
@@ -8,6 +8,6 @@
#ifndef __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
#define __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
-extern u32 __dtb_loongson3_4core_rs780e_begin[];
-extern u32 __dtb_loongson3_8core_rs780e_begin[];
+extern u32 __dtb_loongson64c_4core_rs780e_begin[];
+extern u32 __dtb_loongson64c_8core_rs780e_begin[];
#endif
diff --git a/arch/mips/loongson64/env.c b/arch/mips/loongson64/env.c
index d11bc346bbca..3e7caba8e788 100644
--- a/arch/mips/loongson64/env.c
+++ b/arch/mips/loongson64/env.c
@@ -133,11 +133,11 @@ void __init prom_init_env(void)
case PRID_REV_LOONGSON3A_R2_1:
case PRID_REV_LOONGSON3A_R3_0:
case PRID_REV_LOONGSON3A_R3_1:
- loongson_fdt_blob = __dtb_loongson3_4core_rs780e_begin;
+ loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
break;
case PRID_REV_LOONGSON3B_R1:
case PRID_REV_LOONGSON3B_R2:
- loongson_fdt_blob = __dtb_loongson3_8core_rs780e_begin;
+ loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
break;
default:
break;