diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-02 20:20:12 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-02 20:20:12 -0700 |
commit | f5a8eb632b562bd9c16c389f5db3a5260fba4157 (patch) | |
tree | 82687234d772ff8f72a31e598fe16553885c56c9 /arch/mn10300/include/asm/intctl-regs.h | |
parent | c9297d284126b80c9cfd72c690e0da531c99fc48 (diff) | |
parent | dd3b8c329aa270027fba61a02a12600972dc3983 (diff) |
Merge tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pul removal of obsolete architecture ports from Arnd Bergmann:
"This removes the entire architecture code for blackfin, cris, frv,
m32r, metag, mn10300, score, and tile, including the associated device
drivers.
I have been working with the (former) maintainers for each one to
ensure that my interpretation was right and the code is definitely
unused in mainline kernels. Many had fond memories of working on the
respective ports to start with and getting them included in upstream,
but also saw no point in keeping the port alive without any users.
In the end, it seems that while the eight architectures are extremely
different, they all suffered the same fate: There was one company in
charge of an SoC line, a CPU microarchitecture and a software
ecosystem, which was more costly than licensing newer off-the-shelf
CPU cores from a third party (typically ARM, MIPS, or RISC-V). It
seems that all the SoC product lines are still around, but have not
used the custom CPU architectures for several years at this point. In
contrast, CPU instruction sets that remain popular and have actively
maintained kernel ports tend to all be used across multiple licensees.
[ See the new nds32 port merged in the previous commit for the next
generation of "one company in charge of an SoC line, a CPU
microarchitecture and a software ecosystem" - Linus ]
The removal came out of a discussion that is now documented at
https://lwn.net/Articles/748074/. Unlike the original plans, I'm not
marking any ports as deprecated but remove them all at once after I
made sure that they are all unused. Some architectures (notably tile,
mn10300, and blackfin) are still being shipped in products with old
kernels, but those products will never be updated to newer kernel
releases.
After this series, we still have a few architectures without mainline
gcc support:
- unicore32 and hexagon both have very outdated gcc releases, but the
maintainers promised to work on providing something newer. At least
in case of hexagon, this will only be llvm, not gcc.
- openrisc, risc-v and nds32 are still in the process of finishing
their support or getting it added to mainline gcc in the first
place. They all have patched gcc-7.3 ports that work to some
degree, but complete upstream support won't happen before gcc-8.1.
Csky posted their first kernel patch set last week, their situation
will be similar
[ Palmer Dabbelt points out that RISC-V support is in mainline gcc
since gcc-7, although gcc-7.3.0 is the recommended minimum - Linus ]"
This really says it all:
2498 files changed, 95 insertions(+), 467668 deletions(-)
* tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (74 commits)
MAINTAINERS: UNICORE32: Change email account
staging: iio: remove iio-trig-bfin-timer driver
tty: hvc: remove tile driver
tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers
serial: remove tile uart driver
serial: remove m32r_sio driver
serial: remove blackfin drivers
serial: remove cris/etrax uart drivers
usb: Remove Blackfin references in USB support
usb: isp1362: remove blackfin arch glue
usb: musb: remove blackfin port
usb: host: remove tilegx platform glue
pwm: remove pwm-bfin driver
i2c: remove bfin-twi driver
spi: remove blackfin related host drivers
watchdog: remove bfin_wdt driver
can: remove bfin_can driver
mmc: remove bfin_sdh driver
input: misc: remove blackfin rotary driver
input: keyboard: remove bf54x driver
...
Diffstat (limited to 'arch/mn10300/include/asm/intctl-regs.h')
-rw-r--r-- | arch/mn10300/include/asm/intctl-regs.h | 71 |
1 files changed, 0 insertions, 71 deletions
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h deleted file mode 100644 index d65bbeebe50a..000000000000 --- a/arch/mn10300/include/asm/intctl-regs.h +++ /dev/null @@ -1,71 +0,0 @@ -/* MN10300 On-board interrupt controller registers - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ -#ifndef _ASM_INTCTL_REGS_H -#define _ASM_INTCTL_REGS_H - -#include <asm/cpu-regs.h> - -#ifdef __KERNEL__ - -/* - * Interrupt controller registers - * - Registers 64-191 are at addresses offset from the main array - */ -#define GxICR(X) \ - __SYSREG(0xd4000000 + (X) * 4 + \ - (((X) >= 64) && ((X) < 192)) * 0xf00, u16) - -#define GxICR_u8(X) \ - __SYSREG(0xd4000000 + (X) * 4 + \ - (((X) >= 64) && ((X) < 192)) * 0xf00, u8) - -#include <proc/intctl-regs.h> - -#define XIRQ_TRIGGER_LOWLEVEL 0 -#define XIRQ_TRIGGER_HILEVEL 1 -#define XIRQ_TRIGGER_NEGEDGE 2 -#define XIRQ_TRIGGER_POSEDGE 3 - -/* non-maskable interrupt control */ -#define NMIIRQ 0 -#define NMICR GxICR(NMIIRQ) /* NMI control register */ -#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */ -#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */ -#define NMICR_ABUSERR 0x0008 /* async bus error flag */ - -/* maskable interrupt control */ -#define GxICR_DETECT 0x0001 /* interrupt detect flag */ -#define GxICR_REQUEST 0x0010 /* interrupt request flag */ -#define GxICR_ENABLE 0x0100 /* interrupt enable flag */ -#define GxICR_LEVEL 0x7000 /* interrupt priority level */ -#define GxICR_LEVEL_0 0x0000 /* - level 0 */ -#define GxICR_LEVEL_1 0x1000 /* - level 1 */ -#define GxICR_LEVEL_2 0x2000 /* - level 2 */ -#define GxICR_LEVEL_3 0x3000 /* - level 3 */ -#define GxICR_LEVEL_4 0x4000 /* - level 4 */ -#define GxICR_LEVEL_5 0x5000 /* - level 5 */ -#define GxICR_LEVEL_6 0x6000 /* - level 6 */ -#define GxICR_LEVEL_SHIFT 12 -#define GxICR_NMI 0x8000 /* nmi request flag */ - -#define NUM2GxICR_LEVEL(num) ((num) << GxICR_LEVEL_SHIFT) - -#ifndef __ASSEMBLY__ -extern void set_intr_level(int irq, u16 level); -extern void mn10300_set_lateack_irq_type(int irq); -#endif - -/* external interrupts */ -#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_INTCTL_REGS_H */ |