diff options
author | Alan Kao <alankao@andestech.com> | 2022-03-02 15:42:45 +0800 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2022-03-07 13:54:59 +0100 |
commit | aec499c75cf8e0b599be4d559e6922b613085f8f (patch) | |
tree | eadb9cd597d33c8c2f928dbd41e73b73f0b49398 /arch/nds32/include/asm/pgalloc.h | |
parent | dd865f090f0382ba9e74dc4fe1008c08a67a6fca (diff) |
nds32: Remove the architecture
The nds32 architecture, also known as AndeStar V3, is a custom 32-bit
RISC target designed by Andes Technologies. Support was added to the
kernel in 2016 as the replacement RISC-V based V5 processors were
already announced, and maintained by (current or former) Andes
employees.
As explained by Alan Kao, new customers are now all using RISC-V,
and all known nds32 users are already on longterm stable kernels
provided by Andes, with no development work going into mainline
support any more.
While the port is still in a reasonably good shape, it only gets
worse over time without active maintainers, so it seems best
to remove it before it becomes unusable. As always, if it turns
out that there are mainline users after all, and they volunteer
to maintain the port in the future, the removal can be reverted.
Link: https://lore.kernel.org/linux-mm/YhdWNLUhk+x9RAzU@yamatobi.andestech.com/
Link: https://lore.kernel.org/lkml/20220302065213.82702-1-alankao@andestech.com/
Link: https://www.andestech.com/en/products-solutions/andestar-architecture/
Signed-off-by: Alan Kao <alankao@andestech.com>
[arnd: rewrite changelog to provide more background]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/nds32/include/asm/pgalloc.h')
-rw-r--r-- | arch/nds32/include/asm/pgalloc.h | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/arch/nds32/include/asm/pgalloc.h b/arch/nds32/include/asm/pgalloc.h deleted file mode 100644 index a08e1ebca70e..000000000000 --- a/arch/nds32/include/asm/pgalloc.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -// Copyright (C) 2005-2017 Andes Technology Corporation - -#ifndef _ASMNDS32_PGALLOC_H -#define _ASMNDS32_PGALLOC_H - -#include <asm/processor.h> -#include <asm/cacheflush.h> -#include <asm/tlbflush.h> -#include <asm/proc-fns.h> - -#define __HAVE_ARCH_PTE_ALLOC_ONE -#include <asm-generic/pgalloc.h> /* for pte_{alloc,free}_one */ - -extern pgd_t *pgd_alloc(struct mm_struct *mm); -extern void pgd_free(struct mm_struct *mm, pgd_t * pgd); - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm) -{ - pgtable_t pte; - - pte = __pte_alloc_one(mm, GFP_PGTABLE_USER); - if (pte) - cpu_dcache_wb_page((unsigned long)page_address(pte)); - - return pte; -} - -/* - * Populate the pmdp entry with a pointer to the pte. This pmd is part - * of the mm address space. - * - * Ensure that we always set both PMD entries. - */ -static inline void -pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmdp, pte_t * ptep) -{ - unsigned long pte_ptr = (unsigned long)ptep; - unsigned long pmdval; - - BUG_ON(mm != &init_mm); - - /* - * The pmd must be loaded with the physical - * address of the PTE table - */ - pmdval = __pa(pte_ptr) | _PAGE_KERNEL_TABLE; - set_pmd(pmdp, __pmd(pmdval)); -} - -static inline void -pmd_populate(struct mm_struct *mm, pmd_t * pmdp, pgtable_t ptep) -{ - unsigned long pmdval; - - BUG_ON(mm == &init_mm); - - pmdval = page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE; - set_pmd(pmdp, __pmd(pmdval)); -} - -#endif |