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authorRohan McLure <rmclure@linux.ibm.com>2022-12-01 18:10:19 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2022-12-02 20:46:09 +1100
commit7cd882df9485988f7d9b3fae04fde4e95a4c7a74 (patch)
treee15e662bcdd39fafe445532c3b8c8d58c91c1905 /arch/powerpc/Kconfig
parentefe1691ac814e4cf3653538b701662cbd905bddc (diff)
powerpc/64: Sanitise user registers on interrupt in pseries, POWERNV
Cause pseries and POWERNV platforms to default to zeroising all potentially user-defined registers when entering the kernel by means of any interrupt source, reducing user-influence of the kernel and the likelihood or producing speculation gadgets. Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Rohan McLure <rmclure@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20221201071019.1953023-7-rmclure@linux.ibm.com
Diffstat (limited to 'arch/powerpc/Kconfig')
-rw-r--r--arch/powerpc/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index aec1431be06e..e21d6de797d6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -537,7 +537,7 @@ config HOTPLUG_CPU
config INTERRUPT_SANITIZE_REGISTERS
bool "Clear gprs on interrupt arrival"
depends on PPC64 && ARCH_HAS_SYSCALL_WRAPPER
- default PPC_BOOK3E_64
+ default PPC_BOOK3E_64 || PPC_PSERIES || PPC_POWERNV
help
Reduce the influence of user register state on interrupt handlers and
syscalls through clearing user state from registers before handling