diff options
| author | Tang Yuantian <yuantian.tang@freescale.com> | 2014-01-20 16:26:13 +0800 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-03-19 16:04:23 -0500 |
| commit | 5d1a566e51d01a8bac3f56aec87bcb93395f3255 (patch) | |
| tree | ffdec58d070eab452e56a8ed619cc0d95f539d23 /arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | |
| parent | c7e64b9ce04aa2e3fad7396d92b5cb92056d16ac (diff) | |
powerpc/mpc85xx: Update clock nodes in device tree
The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040, b4420, b4860, t4240
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi index 9bc26b147900..142ac862cacf 100644 --- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi @@ -64,21 +64,25 @@ cpu0: PowerPC,e6500@0 { device_type = "cpu"; reg = <0 1>; + clocks = <&mux0>; next-level-cache = <&L2>; }; cpu1: PowerPC,e6500@2 { device_type = "cpu"; reg = <2 3>; + clocks = <&mux0>; next-level-cache = <&L2>; }; cpu2: PowerPC,e6500@4 { device_type = "cpu"; reg = <4 5>; + clocks = <&mux0>; next-level-cache = <&L2>; }; cpu3: PowerPC,e6500@6 { device_type = "cpu"; reg = <6 7>; + clocks = <&mux0>; next-level-cache = <&L2>; }; }; |