diff options
author | Olof Johansson <olof@lixom.net> | 2019-12-05 13:16:58 -0800 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2019-12-05 13:18:54 -0800 |
commit | 942e6f8a8314e5550e254519dfba4ccd5170421d (patch) | |
tree | 75ec655b440fbc1c454247af38b5596dd8c78de9 /arch/powerpc/boot/dts/fsl/kmcent2.dts | |
parent | 336bab731be76a90291697e51d2aed0ad67d7cb5 (diff) | |
parent | b08baef02b26cf7c2123e4a24a2fa1fb7a593ffb (diff) |
Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/kmcent2.dts')
-rw-r--r-- | arch/powerpc/boot/dts/fsl/kmcent2.dts | 52 |
1 files changed, 47 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dts/fsl/kmcent2.dts index 48b7f9797124..8e7f0828af29 100644 --- a/arch/powerpc/boot/dts/fsl/kmcent2.dts +++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts @@ -210,13 +210,19 @@ fman@400000 { ethernet@e0000 { - fixed-link = <0 1 1000 0 0>; - phy-connection-type = "sgmii"; + phy-mode = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; }; ethernet@e2000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "sgmii"; + phy-mode = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; }; ethernet@e4000 { @@ -229,7 +235,7 @@ ethernet@e8000 { phy-handle = <&front_phy>; - phy-connection-type = "rgmii"; + phy-mode = "rgmii-id"; }; mdio0: mdio@fc000 { @@ -258,14 +264,50 @@ pci1: pcie@ffe250000 { status = "disabled"; + reg = <0xf 0xfe250000 0 0x10000>; + ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000 + 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; }; pci2: pcie@ffe260000 { status = "disabled"; + reg = <0xf 0xfe260000 0 0x10000>; + ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000 + 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; }; pci3: pcie@ffe270000 { status = "disabled"; + reg = <0xf 0xfe270000 0 0x10000>; + ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000 + 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xe0000000 + 0x02000000 0 0xe0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; }; qe: qe@ffe140000 { |