[POWERPC] Removed hardcoded phandles from dts

Remove explicit phandles and move to using references that autogenerate the
phandles when needed.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 38 insertions, 39 deletions

diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 00211b39a342..5185625a9419 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -62,13 +62,12 @@
 			reg = <200 38>;
 		};
 
-		pic@500 {
+		mpc5200_pic: pic@500 {
 			// 5200 interrupts are encoded into two levels;
-			linux,phandle = <500>;
 			interrupt-controller;
 			#interrupt-cells = <3>;
 			device_type = "interrupt-controller";
-			compatible = "mpc5200b-pic\0mpc5200-pic";
+			compatible = "mpc5200b-pic\0mpc5200_pic";
 			reg = <500 80>;
 			built-in;
 		};
@@ -79,7 +78,7 @@
 			cell-index = <0>;
 			reg = <600 10>;
 			interrupts = <1 9 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			has-wdt;
 		};
 
@@ -89,7 +88,7 @@
 			cell-index = <1>;
 			reg = <610 10>;
 			interrupts = <1 a 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@620 {	// General Purpose Timer
@@ -98,7 +97,7 @@
 			cell-index = <2>;
 			reg = <620 10>;
 			interrupts = <1 b 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@630 {	// General Purpose Timer
@@ -107,7 +106,7 @@
 			cell-index = <3>;
 			reg = <630 10>;
 			interrupts = <1 c 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@640 {	// General Purpose Timer
@@ -116,7 +115,7 @@
 			cell-index = <4>;
 			reg = <640 10>;
 			interrupts = <1 d 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@650 {	// General Purpose Timer
@@ -125,7 +124,7 @@
 			cell-index = <5>;
 			reg = <650 10>;
 			interrupts = <1 e 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@660 {	// General Purpose Timer
@@ -134,7 +133,7 @@
 			cell-index = <6>;
 			reg = <660 10>;
 			interrupts = <1 f 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpt@670 {	// General Purpose Timer
@@ -143,7 +142,7 @@
 			cell-index = <7>;
 			reg = <670 10>;
 			interrupts = <1 10 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		rtc@800 {	// Real time clock
@@ -151,7 +150,7 @@
 			device_type = "rtc";
 			reg = <800 100>;
 			interrupts = <1 5 0 1 6 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		mscan@900 {
@@ -159,7 +158,7 @@
 			compatible = "mpc5200b-mscan\0mpc5200-mscan";
 			cell-index = <0>;
 			interrupts = <2 11 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			reg = <900 80>;
 		};
 
@@ -168,7 +167,7 @@
 			compatible = "mpc5200b-mscan\0mpc5200-mscan";
 			cell-index = <1>;
 			interrupts = <2 12 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			reg = <980 80>;
 		};
 
@@ -176,14 +175,14 @@
 			compatible = "mpc5200b-gpio\0mpc5200-gpio";
 			reg = <b00 40>;
 			interrupts = <1 7 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		gpio-wkup@c00 {
 			compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
 			reg = <c00 40>;
 			interrupts = <1 8 0 0 3 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		pci@0d00 {
@@ -194,18 +193,18 @@
 			compatible = "mpc5200b-pci\0mpc5200-pci";
 			reg = <d00 100>;
 			interrupt-map-mask = <f800 0 0 7>;
-			interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
-			                 c000 0 0 2 500 1 1 3
-			                 c000 0 0 3 500 1 2 3
-			                 c000 0 0 4 500 1 3 3
-
-			                 c800 0 0 1 500 1 1 3 // 2nd slot
-			                 c800 0 0 2 500 1 2 3
-			                 c800 0 0 3 500 1 3 3
-			                 c800 0 0 4 500 0 0 3>;
+			interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+			                 c000 0 0 2 &mpc5200_pic 1 1 3
+			                 c000 0 0 3 &mpc5200_pic 1 2 3
+			                 c000 0 0 4 &mpc5200_pic 1 3 3
+
+			                 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+			                 c800 0 0 2 &mpc5200_pic 1 2 3
+			                 c800 0 0 3 &mpc5200_pic 1 3 3
+			                 c800 0 0 4 &mpc5200_pic 0 0 3>;
 			clock-frequency = <0>; // From boot loader
 			interrupts = <2 8 0 2 9 0 2 a 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			bus-range = <0 0>;
 			ranges = <42000000 0 80000000 80000000 0 20000000
 			          02000000 0 a0000000 a0000000 0 10000000
@@ -217,7 +216,7 @@
 			compatible = "mpc5200b-spi\0mpc5200-spi";
 			reg = <f00 20>;
 			interrupts = <2 d 0 2 e 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		usb@1000 {
@@ -225,7 +224,7 @@
 			compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
 			reg = <1000 ff>;
 			interrupts = <2 6 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		bestcomm@1200 {
@@ -236,7 +235,7 @@
 			              3 4 0  3 5 0  3 6 0  3 7 0
 			              3 8 0  3 9 0  3 a 0  3 b 0
 			              3 c 0  3 d 0  3 e 0  3 f 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		xlb@1f00 {
@@ -251,7 +250,7 @@
 			cell-index = <0>;
 			reg = <2000 100>;
 			interrupts = <2 1 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		// PSC2 in ac97 mode example
@@ -261,7 +260,7 @@
 		//	cell-index = <1>;
 		//	reg = <2200 100>;
 		//	interrupts = <2 2 0>;
-		//	interrupt-parent = <500>;
+		//	interrupt-parent = <&mpc5200_pic>;
 		//};
 
 		// PSC3 in CODEC mode example
@@ -271,7 +270,7 @@
 		//	cell-index = <2>;
 		//	reg = <2400 100>;
 		//	interrupts = <2 3 0>;
-		//	interrupt-parent = <500>;
+		//	interrupt-parent = <&mpc5200_pic>;
 		//};
 
 		// PSC4 in uart mode example
@@ -281,7 +280,7 @@
 		//	cell-index = <3>;
 		//	reg = <2600 100>;
 		//	interrupts = <2 b 0>;
-		//	interrupt-parent = <500>;
+		//	interrupt-parent = <&mpc5200_pic>;
 		//};
 
 		// PSC5 in uart mode example
@@ -291,7 +290,7 @@
 		//	cell-index = <4>;
 		//	reg = <2800 100>;
 		//	interrupts = <2 c 0>;
-		//	interrupt-parent = <500>;
+		//	interrupt-parent = <&mpc5200_pic>;
 		//};
 
 		// PSC6 in spi mode example
@@ -301,7 +300,7 @@
 		//	cell-index = <5>;
 		//	reg = <2c00 100>;
 		//	interrupts = <2 4 0>;
-		//	interrupt-parent = <500>;
+		//	interrupt-parent = <&mpc5200_pic>;
 		//};
 
 		ethernet@3000 {
@@ -310,7 +309,7 @@
 			reg = <3000 800>;
 			mac-address = [ 02 03 04 05 06 07 ]; // Bad!
 			interrupts = <2 5 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		ata@3a00 {
@@ -318,7 +317,7 @@
 			compatible = "mpc5200b-ata\0mpc5200-ata";
 			reg = <3a00 100>;
 			interrupts = <2 7 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 		};
 
 		i2c@3d00 {
@@ -327,7 +326,7 @@
 			cell-index = <0>;
 			reg = <3d00 40>;
 			interrupts = <2 f 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			fsl5200-clocking;
 		};
 
@@ -337,7 +336,7 @@
 			cell-index = <1>;
 			reg = <3d40 40>;
 			interrupts = <2 10 0>;
-			interrupt-parent = <500>;
+			interrupt-parent = <&mpc5200_pic>;
 			fsl5200-clocking;
 		};
 		sram@8000 {