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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2016-04-29 23:26:23 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2016-05-11 21:53:54 +1000
commit5ed7ecd08a0807d6d616c3d958402f9c723bb048 (patch)
tree416bd1a8321d42861a301e10eecd0f37902fd1d6 /arch/powerpc/include/asm/book3s/64/hash-4k.h
parenta3dece6d69b0ad21b64104dff508c67a1a1f14dd (diff)
powerpc/mm: pte_frag abstraction
In this patch we make the number of pte fragments per level 4 page table page a variable. Radix level 4 table size is 256 bytes and hence we can have 256 fragments per level 4 page. We don't update the fragment count in this patch. We need to do performance measurements to find the right value for fragment count. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/book3s/64/hash-4k.h')
-rw-r--r--arch/powerpc/include/asm/book3s/64/hash-4k.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index dcb9d6e94a0c..99f360e0ecb0 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -28,6 +28,8 @@
#define H_PAGE_4K_PFN 0x0
#define H_PAGE_THP_HUGE 0x0
#define H_PAGE_COMBO 0x0
+#define H_PTE_FRAG_NR 0
+#define H_PTE_FRAG_SIZE_SHIFT 0
/*
* On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
*/