diff options
| author | Scott Wood <scottwood@freescale.com> | 2014-03-10 17:29:38 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-03-19 19:57:27 -0500 |
| commit | 609af38f8fc0f1dab993b2c67f90d07f761ea902 (patch) | |
| tree | a8d0383323961cc1dd7aeb331c7c29a8ed478995 /arch/powerpc/include/asm/paca.h | |
| parent | 31f712482894d723e38490139eb03156a5d3eb59 (diff) | |
powerpc/booke64: Critical and machine check exception support
Add special state saving for critical and machine check exceptions.
Most of this code could be used to handle debug exceptions taken from
kernel space, but actually doing so is outside the scope of this patch.
The various critical and machine check exceptions now point to their
real handlers, rather than hanging the kernel.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/paca.h')
| -rw-r--r-- | arch/powerpc/include/asm/paca.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index 948f01a04cc3..8e956a0b6e85 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h @@ -116,8 +116,11 @@ struct paca_struct { /* Shared by all threads of a core -- points to tcd of first thread */ struct tlb_core_data *tcd_ptr; - /* We can have up to 3 levels of reentrancy in the TLB miss handler */ - u64 extlb[3][EX_TLB_SIZE / sizeof(u64)]; + /* + * We can have up to 3 levels of reentrancy in the TLB miss handler, + * in each of four exception levels (normal, crit, mcheck, debug). + */ + u64 extlb[12][EX_TLB_SIZE / sizeof(u64)]; u64 exmc[8]; /* used for machine checks */ u64 excrit[8]; /* used for crit interrupts */ u64 exdbg[8]; /* used for debug interrupts */ |