diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-07-08 16:37:06 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-07-17 16:42:44 +1000 |
| commit | 9baaef0a22c82a6c5d85b7535240e778c06e5b20 (patch) | |
| tree | 8409aaa1733fc19b6a80333c95a37c7a5ca54d0a /arch/powerpc/include/asm/reg.h | |
| parent | b88d4bce2b883e7f357ecf8f0cae070b9732f82b (diff) | |
powerpc/irq: Add support for HV virtualization interrupts
This will be delivering external interrupts from the XIVE to the
Hypervisor. We treat it as a normal external interrupt for the
lazy irq disable code (so it will be replayed as a 0x500) and
route it to do_IRQ.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index c0263a2d1008..6de6abe7deef 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -363,6 +363,7 @@ #define LPCR_LPES1 0x00000004 /* LPAR Env selector 1 */ #define LPCR_LPES_SH 2 #define LPCR_RMI 0x00000002 /* real mode is cache inhibit */ +#define LPCR_HVICE 0x00000002 /* P9: HV interrupt enable */ #define LPCR_HDICE 0x00000001 /* Hyp Decr enable (HV,PR,EE) */ #define LPCR_UPRT 0x00400000 /* Use Process Table (ISA 3) */ #ifndef SPRN_LPID |