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authorNicholas Piggin <npiggin@gmail.com>2021-09-23 00:54:47 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2021-12-16 21:31:45 +1100
commit4423eb5ae32ec613af3fceee2fe84234e417ee55 (patch)
tree277fd1de2bb3dd95bbb78aa0e942201bc9bcb10b /arch/powerpc/kernel/exceptions-64s.S
parent0a006ace634dcaf1bbf9125fb8089a4a50bf33d6 (diff)
powerpc/64/interrupt: make normal synchronous interrupts enable MSR[EE] if possible
Make synchronous interrupt handler entry wrappers enable MSR[EE] if MSR[EE] was enabled in the interrupted context. IRQs are soft-disabled at this point so there is no change to high level code, but it's a masked interrupt could fire. This is a performance disadvantage for interrupts which do not later call interrupt_cond_local_irq_enable(), because an an additional mtmsrd or wrtee instruction is executed. However the important synchronous interrupts (e.g., page fault) do enable interrupts, so the performance disadvantage is mostly avoided. In the next patch, MSR[RI] enabling can be combined with MSR[EE] enabling, which mitigates the performance drop for the former and gives a performance advanage for the latter interrupts, on 64s machines. 64e is coming along for the ride for now to avoid divergences with 64s in this tricky code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210922145452.352571-2-npiggin@gmail.com
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